OFC 2019: eSilicon to demonstrate two 7nm IP products

February 26, 2019 eSilicon

eSilicon, a leading provider of FinFET-class ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, will demonstrate two 7nm FinFET-class IP products at OFC 2019.

What:

SerDes Demonstrations: eSilicon Booth 5416

Tuesday-Thursday

March 5-7, 2019

Using Samtec ExaMAX Backplane Connector paddle cards and a five-meter ExaMAX Backplane Cable Assembly, eSilicon will demonstrate the performance, flexibility and extremely low power consumption of its 7nm, 56G PAM4 and NRZ DSP-based long-reach SerDes.

The demonstration will drive eight high-speed SerDes lanes in three configurations:

PAM4 modulation with point-to-point links

NRZ modulation with point-to-point links

PAM4 modulation with double-length (10 meter) loop-back links with repeater

All channels will be run at different speeds to showcase the flexibility of the SerDes device. Real-time data associated with all channels will also be displayed to demonstrate the robustness and low power of the device, including:

Voltage histograms, pre- and post-DSP

Signal-to-noise ratio

Equalization

Error rate plots

HBM PHY Subsystem Demonstrations: eSilicon Booth 5416

Tuesday-Thursday

March 5-7, 2019

2.4Gbps HBM2 PHY Subsystem for High-Performance Computing, Networking & AI

This demonstration shows a complete high-bandwidth memory Gen2 (HBM2) solution in 7nm operating at 2.4Gbps.

The subsystem includes:

eSilicon’s latest 7nm HBM2 PHY

Northwest Logic memory controller

The test chip uses leading-edge interposer technology to interconnect the integrated PHY and controller with the 3D DRAM stack

The firmware, combined with a user-friendly graphical interface (GUI), allows test and validation of the HBM subsystem

Among other tests and monitoring tools available, this board demonstrates the link margin of the complete subsystem with the internal eye monitor and schmoo

About OFC

March 5-7, 2019

San Diego Convention Center

San Diego, Calif., USA

OFC is the largest global conference and exhibition for optical communications and networking professionals. The program is comprehensive -- from research to marketplace, from components to systems and networks and from technical sessions to the exhibition.

About eSilicon

eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets. www.esilicon.com

Collaborate. Differentiate. Win.™

eSilicon is a registered trademark, and the eSilicon logo, neuASIC and “Collaborate. Differentiate. Win.” are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.

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