Micron Xccella Flash to Drive Xilinx Versal ACAP AI Acceleration Platforms

October 1, 2019 Brandon Lewis

Xilinx has adopted Micron’s Xcella flash memory for its Versal adaptive compute acceleration platform (ACAP). Xccella’s JEDEC xSPI-compliant bus interface delivers an 8x boot and configuration performance improvement over quad SPI NOR flash in Xilinx Versal ACAP platforms. Xcella flash technology also consumes 30 percent less energy per bit over quad SPI NOR flash while providing 400 MBps bandwidth in double-data rate mode,

Xcella flash is built on a 45 nm NOR flash process, and meets AEC-Q100 requirements. The 256 MB to 2 GB devices are available in -40ºC to +125ºC operating temperature ranges.

Heterogeneous, programmable ACAP patforms are leveraging the Micron Octal SPI flash to help AI, automotive, and other safety-critical data processing architectures meet near-instant-on design requirements.

For more information, visit www.micron.com/products/nor-flash/xccela-flash.

 

 

About the Author

Brandon Lewis

Brandon Lewis, Editor-in-Chief of Embedded Computing Design, is responsible for guiding the property's content strategy, editorial direction, and engineering community engagement, which includes IoT Design, Automotive Embedded Systems, the Power Page, Industrial AI & Machine Learning, and other publications. As an experienced technical journalist, editor, and reporter with an aptitude for identifying key technologies, products, and market trends in the embedded technology sector, he enjoys covering topics that range from development kits and tools to cyber security and technology business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached by email at brandon.lewis@opensysmedia.com.

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