SmartDV Heads to ChipEx2019 in Israel with Extensive Design and Verification IP Portfolio

May 16, 2019 SmartDV Technologies

SmartDV Technologies, the Proven and Trusted choice for Verification Intellectual Property (VIP), Design IP and verification services

WHAT: Will feature its extensive portfolio of Verification IP and Design IP compatible with all verification languages, platforms and methodologies at ChipEx2019, the annual conference of the Israeli Microelectronics Industry. Also highlighted will be SmartDV's proprietary SmartCompiler™ that automates rapid creation and customization of its Design and Verification IP in use at more than 120 leading networking, storage, wireless and memory companies.

WHEN: Monday, May 13

WHERE: Tel Aviv Convention Center, Tel Aviv, Israel

About SmartDV
SmartDV™ Technologies is the Proven and Trusted choice for Verification and Design IP with the best customer service from more than 250 experienced ASIC and SoC design and verification engineers. Its high-quality standard or custom protocol Verification and Design IP is compatible with all verification languages, platforms and methodologies supporting all simulation, emulation and formal verification tools used in a coverage-driven chip design verification flow. The result is Proven and Trusted Verification and Design IP used in hundreds of networking, storage, automotive, bus, MIPI and display chip projects throughout the global electronics industry. SmartDV is headquartered in Bangalore, India, with U.S. headquarters in San Jose, Calif. Visit www.Smart-DV.com to learn more.

Connect with SmartDV at:
Linkedin: https://www.linkedin.com/company/smartdv-technologies/about/
Twitter: @SmartDV

Previous Article
ICP Releases Slot CPU Card with 56 PCI Express Lanes

The PEMUX-XEW1 slot CPU card from Industrial Computer Products (ICP) Germany suits high-performance compute...

Next Article
Increase Battery Life of Consumer Products Using Architecture Simulation

For any new system, the number of power states, concurrent thread operations, transition times and switchin...