Innergy Systems Fuels Verific's Parser Platform

October 23, 2018 Laura Dolan

Innergy Systems has licensed Verific Design’s Automation Parser Platform as its new Power Analysis Platform combining quick-debug power analysis with fast power model generation.

The new platform will exist within an existing chip design flow, building fast power models in a more initial stage of the design cycle, preventing power complications later in the process, and an exploration of quick debugging in an effort to reduce power while improving performance.

The Parser Platforms are distributed as C++ source code and gather on all 32- and 64-bit Unix, Linux, Mac and Windows operating systems.

“To say that Verific enabled Innergy Systems would be an understatement,” said Ninad Huilgol, Innergy’s founder and chief executive officer. “Without its parser platform, our development cycle would have been immeasurably extended. Integrating the Verific front end with our Power Analysis Platform gave us the thrust we needed to deliver our software ahead of our project schedule.”

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