Mentor’s Calibre, Analog FastSPICE Certified for TSMC N5, N6 Processes

May 18, 2020 Brandon Lewis

Mentor's Calibre nmPlatform, Calibre xACT extraction tool, Analog FastSPICE Platform, and other IC design technologies have been certified to TSMC’s N5 and N6 process technologies. The N5 and N6 process technologies allow processor design companies to increase performance, reduce form factors, and minimize power consumption in competitive application areas.

Mentor and TSMC are also collaborating on the use of Calibre 3DSTACK packaging technology to support TSMC's CoWoS platforms that feature a silicon interposer for inter-die port connectivity and use Calibre xACT for parasitic extraction.

In addition, Mentor, a Siemens  business revealed that the AFS platform supports TSMC's mobile and HPC design platform for customers designing analog, mixed-signal, and RF designs.

For more information on updates to Mentor's EDA tool suite, visit

About the Author

Brandon Lewis

Brandon Lewis, Editor-in-Chief of Embedded Computing Design, is responsible for guiding the property's content strategy, editorial direction, and engineering community engagement, which includes IoT Design, Automotive Embedded Systems, the Power Page, Industrial AI & Machine Learning, and other publications. As an experienced technical journalist, editor, and reporter with an aptitude for identifying key technologies, products, and market trends in the embedded technology sector, he enjoys covering topics that range from development kits and tools to cyber security and technology business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached by email at

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