ESD Alliance Takes SMART Design to SEMICON Europa

November 4, 2019 ESD Alliance

The Electronic System Design (ESD) Alliance, a SEMI Strategic Association Partner, today unveiled SMART Design, the first system-centric series showcasing advances in electronic system design to be held at SEMICON Europa.

SEMICON Europa will begin Tuesday, November 12, through Friday, November 15, at Messe München in Munich, Germany. SMART Design is scheduled for Wednesday, November 13, from 2:30 p.m. until 5 p.m. in TechARENA 1, Hall B1.

Also debuting this year at SEMICON Europa is the SMART Transportation Forum led by SEMI's Global Automotive Advisory Council (GAAC) with presentations from the design, semiconductor equipment and materials suppliers and automotive OEM communities. "Including SMART Design into the SEMICON Europa program is especially timely as transportation and automotive electronics become increasingly reliant upon design tools and methodologies," says Bob Smith, executive director of the ESD Alliance. The SMART Transportation Forum, "Connected-to-Everything Automated Mobility," will be held Tuesday, November 12, from 9:30 a.m. until 3:30 p.m. in Room 14C at International Congress Center Munich.

SMART Design's program, "Designing Electronic Systems for Future Applications," will feature a series of presentations and a panel discussion highlighting how advances in electronic system design are enabling emerging and future applications.

After introductory remarks from Smith, Babak Taheri, Silvaco's chief executive officer (CEO) and chief technology officer (CTO), will present "Next Generation SoC Design: From Atoms to Systems." "Near-Threshold Logic Benefits the Full Application Stack," will be addressed by Lauri Koskinen, CTO of Minima Processor. Next up will be "Deep Learning for Electronics Manufacturing" by Javier Cabello, software and vision engineer at Mycronic AB.

David Pellerin, head of worldwide business development, Hitech/Semiconductor for Amazon Web Services, will offer a look at "Cloud-Accelerated Innovation for Semiconductor Design and Verification." Ian Campbell, OnScale's CEO, follows with a presentation describing "Cloud Engineering Simulation: A Game Changer for Engineers." The last presentation before a closing panel session is titled, "Addressing the 'New-Space' Paradigm Shift in Development and Production of High Reliability, Space Grade Semiconductor Components." The presenter will be Christian Sayer, field applications engineer from Cobham Advanced Electronics Solutions.

Jim Hogan, managing partner of Vista Ventures, LLC., will moderate "The Risk of Obsolete Design and Verification Environments in the RISC-V Era." Panelists include Gabriele Pulini, senior business development manager at Mentor, a Siemens Business; Silvaco's Babak Taheri; Adnan Hamid, Breker Verification Systems' CEO; and Paul Cunningham, corporate vice president and general manager of the System Verification Group from Cadence Design Systems, Inc.

A networking hour hosted by the ESD Alliance and SEMI immediately follows.

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