Researchers at Princeton recently found memory consistency errors in the RISC-V instruction set architecture (ISA), an extensible, open-source ISA spawned out of academia that is being adopted by industry in the development of everything from Internet of Things (IoT) microcontrollers (MCUs) to data center processors. While certain media outlets have sensationalized these findings, the Embedded Insiders ask Rick O’Connor, Executive Director of the RISC-V Foundation for the real scoop. As you’ll hear, there are far fewer errors than originally reported, and those that exist apply to more complex instantiations of the ISA for multicore devices that have yet to be realized in silicon. Meanwhile, the power of the open source community has been applied to address the issue.
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