Down to 16 nm, UltraScale+ breeds new levels of performance

May 6, 2015 OpenSystems Media

A little while back, Xilinx introduced its UltraScale+ architecture, which is 16 nm technology. The new architecture will show up in the company’s Kintex and Virtex FPGAs and Zynq SoC products. It also impacts memory technology, with UltraRAM offering up to 432 Mb of RAM. With banks of this size, designers can potentially replace external memory with on-chip memory. The reduced parts count results in lower cost and lower power consumption.

UltraRAM is being combined with a new interconnect optimization technology called SmartConnect. According to the company, it provides an additional 20 percent to 30 percent performance, area, and power advantages through intelligent system-wide interconnect optimization. It does this by applying interconnect topology optimizations to match design-specific throughput and latency requirements while reducing interconnect logic area.

The Zynq SoC that’s built with UltraScale+ employs heterogeneous multi-processing, deploying the “the right engines for the right tasks.” Compared to previous parts, the performance improvements could be up to 5X. The latest Zynq is designed with a 64-bit quad-core ARM Cortex-A53 processor, capable of hardware virtualization, asymmetric processing, and full ARM TrustZone technology support. The previous generation Zynq was deigned with a 32-bit dual-core ARM Cortex-A9 processor.

The processing subsystem also includes a dual-core Cortex-R5 processor for real-time deterministic operation, ensuring high throughput and low latency. A separate security unit enables features like secure boot, key and vault management, and anti-tamper.

Rich Nass, Embedded Computing Brand Director
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