Electrical energy generation is moving toward more environmentally friendly options, and solar and wind energy lead the pack. The problem is, these energy sources are transients, making them more susceptible to energy generation loss. In order to make these methods more viable, the efficiency of the energy conversion between direct current (DC) toand alternating current (AC) must be improved. To achieve this, new inverter methods have been designed and implemented on both solar and wind power plants, especially the neutral-point clamped (NPC) inverter. The NPC is applied to photovoltaic (PV) panels and has several advantages over other methods, but it can be improved in several ways. Increasing its number of levels, implementing more complex control methods, and employing faster power control loops are proving essential in its implementation.

In recent years environmental concerns have resulted in a move towardsWiths clean electrical energy generation, and a lack or intermittence of resources to generate it as well as geographic constraints have lead to increasing exploitation of alternative means of electricity generation. These are mainly solar and wind energy, which essentially do not exhaust any resources and can be employed almost everywhere.

However, environmentally friendly methods of energy generation such as wind and solar energy rely on transient resources (the sun and the wind), which cannot be controlled. Transient energy sources, coupled with inconsisten energy utilization by populations, can damage an electrical grid due to load variations that can introduce harmonics and deteriorate the quality and reliability of electrical distribution networks. Therefore, an important way to improve environmentally friendly energy generation is by making DC to AC energy conversion more efficient, a process that is performed by an inverter. Aside from energy conversion, inverters are also responsible for grid synchronization, and increased efficiency in these systems can not only help protect the grid from transient load damage, but make energy more affordable for customers as well.

Several inverter topologies exist, varying from off-grid and grid-connected inverters, transformer-based or transformerless inverters, and open-loop or closed-loop architectures. These topologies can also have different levels of influence on the resolution and switching pattern of the inverter, and, furthermore, these settings determine the size, weight, price, complexity, operation, harmonic generation, utilization, efficiency, and other aspects of the system, all of which directly affect the final product.

Among the transformerless photovoltaic inverters there are two main families: H-bridge (or full-bridge) and NPC. Apart from classical implementations, in each of these families there are several variations with different specifications and characteristics that make them more suitable for specific applications.

A modulation technique must be implemented in order to modulate the conversion of an inverter. There are several types of pulse-width modulation (PWM) techniques that can be applied to inverters and motor drivers, including sinusoidal PWM (SPWM), space vector PWM (SVPWM), shift-phase PWM, and selecteive harmonics elimination PWM. Each of these is suitable for specific applications, and the more versatile modulation strategies to employ with PV inverters are SPWM and SVPWM due to the wide switching frequency range and ease of implementation in multi-level inverters. However, as SVPWM operates as a combined effect of all the three phases of an inverter’s output instead of single phases, it has become the more popular technique for three-phase and multi-level inverters.

One of the fundamental requirements of a grid-connected converter (AC to DC conversion versus DC to AC conversion in an inverter) is grid synchronization. This requirement is directly correlated to the converter’s efficiency and there are different ways of implementing it. A phase-locked loop (PLL) connected to the grid, for instance, is often used to fulfill this requirement.

The following describes an SVPWM current control technique for multi-level three-phase NPC inverter topologies, focusing on three- and five-level topologies implemented with a closed-loop vector control and positive-sequence voltage detector to stabilize any grid fault. Parts one and two focus on PV applications, and all the results presented in it were acquired by simulating the system with Mathworks Simulink software.

Diode neutral-point clamped topologies

A diode NPC topology (Figures 1 and 2)is formed by the combination of insulated-gate bipolar transistors (IGBT) and diodes (Figures 1 and 2). Structurally, the NPC’s main concept is that by clamping PV panels to a grounded middle point of the DC bus using diodes, zero voltage can be achieved.

This inverter topology is mainly used in mini-central three-phase PV inverters and high-power central inverters, and has several advantages over H-bridge topologies that make it more suitable for implementation as an inverter for high-efficiency PV panels. For instance, while it was developed later than the H-bridge, it achieves improvements compared to classical full-bridge implementations such as lower dV/dt and switch stress. Moreover, its versatility allows it to be used as a single-phase and three-phase inverter since it can be implemented as a three-phase, four-wire converter.

This topology has several other advantages as well, such as unipolar voltage across the filter, which lowers core losses. Diode NPC-based conversion also exhibits high efficiency (up to 98 percent) since there is no reactive power exchange between the inductance in its output and the capacitance in its filter during zero voltage, and it also yields very low leakage current and produces low electromagnetic interference (EMI).

Furthermore, with the increase in electricity demand, inverters have been improved to generate more voltage levels. The more voltage levels an inverter has, the better the quality of its AC output due to the lower distortion that higher levels cause in output voltage, which can result in increased overall system efficiency. This highere number of levels does carry a trade-off between switching losses and conduction losses, though, as the latter increases according to the increase in levels while switching losses reduce. Thus, multi-level inverters reduce stress on semiconductor components, lowering failures and extending the life of inverter components. TheMulti-level NPC inverters experience reductions in total harmonic distortion (THD) and theexperiences switching frequency of each device, which reduces total power loss. They also do not require step-up or step-down transformers, use smaller AC filters, and reduce electromagnetic compatibility issues.

[Figure 1 | Three-level diode NPC topology]

[Figure 2 | Five-level diode NPC topology]

Space vector pulse-width modulation

In order to use a SVPWM implementation, voltage and current are expressed as space vectors according to their phase and magnitude. This method allows instantaneous properties to be analyzed using an efficient formula, which is particularly useful in controlling active and reactive power components in three-phase systems, including the balance of the NPC DC bus voltage. The SVPWM technique uses a reference space vector input created by the instantaneous, line-neutral, three-phase currents or voltages generated from the inverter’s connection with the grid. This method analyzes instantaneous current or voltage properties, which facilitates control over active and reactive power components in three-phase systems.

Usually the SVPWM has multiple levels that can match a given inverter. For the inverter described, the matching level is the most straight forward implementation since using different levels for the SVPWM and the inverter would require a thorough evaluation and design of the system.

Despite the advantages of multi-level SVPWM, the higher the level of an inverter the more switches it has to control, so it becomes increasingly computationally intensive for the modulation technique to calculate the duty cycles of each switch, as well as the switching sequence for optimal performance of the power converter. The speed of response can be improved using look-up tables (LUTs), but these restrict the response of the system to predictable events only.

The SVPWM method works as follows:

- From the line-neutral three-phase voltages, the technique determines the reference space vector.
- Then, from a predefined set of voltage vectors, it defines all of the different switching combinations, which can be represented in a space vector diagram.
- Modulation extracts the instantaneous angle and magnitude information from the reference space vector.
- It then plots the rotating reference space vector into a diagram like that shown in Figure 3, determining the region and the sector that the reference space vector is in.
- From the voltage vector information that comprises a region and sector, the switch’s dwell time is calculated.
- Finally, modulation generates the PWM pulses that drive the inverter in order to generate the desired voltage.
- This process is cyclical and starts over as soon as its pulses generate the desired output.

In fact, this technique compares the space vector information with voltage vectors that comprise the space vector diagram, generating the instantaneous switching states used to modulate the inverter. For angle and magnitude information, the SVPWM generates a space vector that represents the actual characteristics of the system. Then this space vector is plotted on the diagram, and from its position in relation to the nearby vector coordinates, a switching pattern is calculated. This switching pattern is calculated almost instantaneously and denotes the duty cycle of the modulation to the inverter.

After being calculated, space vectors need to be represented on a diagram and then analyzed. This diagram is a hexagon in which each intersection represents at least one voltage vector. Some of these connections can have more than one voltage vector called redundant vectors since all the vectors located at the same intersection represent the same switching sequence. Each level of the SVPWM increases the complexity of the diagram, which increases the number of intersections. For instance, the three-level space-vector diagram has 19 intersections (Figure 3) and the five-level space-vector diagram has 61 intersections (Figure 4). Each level increases the number of intersections according to the polynomial equation:

Intersections = 3 * Level 2 – 3 + Level + 1

[Figure 3 | Three-level space-vector diagram]

[Figure 4 | Five-level space-vector diagram]

Each level increases the number of intersections according to the polynomial equation:

Intersections = 3 * Level 2 – 3 + Level + 1

The higher the level, the more precise the SVPWM calculation must be since the sectors and regions are smaller, resulting in greater complexity in the system. Therefore, not only do the number of voltage vectors, sectors, and regions greatly rise as the SVPWM level increases, escalating the complexity of the modulation, but the performance and efficiency of the system is improved.

This article will be continued in part two.

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