Ambiq Micro has stated that its Arm Cortex-M4F-based Apollo3 Blue Wireless SoC has achieved active power consumption of less than six microamperes per megahertz (6 uA/MHz) thanks to TSMC’s 40 nm ultra-low-power (40ULP) low-Vdd process technology. Combined with Ambiq’s Subthreshold Power Optimized Technology (SPOT), the 40ULP process will enable the Apollo3 wireless SoC in battery-powered designs.
The Apollo3 Blue Wireless SoC integrates a dedicated core for BLE5 stacks, a DMA engine, QSPI interface, microphone inputs, and advanced stepper motor control for analog management.
TSMC’s 40ULP technology provides low-leakage transistors, which help Apollo3 SoCs conserve power by optimizing leakage paths in gates and junctions. The low-Vdd solution is supported by multiple Vt option transistors, and deliver a standard cell operating voltage of 0.7V. An eHVT ultra-low-leakage transistor and ultra-low-leakage (SRAM) bitcell are also incorporated into the Apollo3 design.
The Apollo3 Blue Wireless SoC is the basis for Ambiq’s Voice-on-SPOT reference platform.
For more information, visit ambiqmicro.com.
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