THine Introduces MIPI CSI-2 4Gbps/Lane SerDes Chipset

August 9, 2019 Alix Paultre

THine announced high-volume availability of their MIPI CSI-2 extension chipset, THCV241A and THCV242, which allows engineers to extend MIPI CSI-2 transmission from 1 foot to over 15 meters. The video chips also enable designs that can receive two different video inputs simultaneously, as well as applications that can copy and distribute (simultaneously replicate) one video stream into two separate streams.

The THCV241A serializes up to four lanes of MIPI CSI-2 signals and converts it into one or two lanes of V-by-One HS technology, which supports up to 4 Gbps per lane, enough to extend the transmission of 1080p60 2Mpixel uncompressed video for greater than 15 meters with typical cables. THCV241A’s 2 lanes of V-by-One HS supports up to an 8 Gbps data rate with the capability to use the second V-by-One HS lane to support data copy and distribution (replication) applications.

The THCV242 chip deserializes up to two V-by-One HS lanes back to the original MIPI CSI-2 signal. The chipset supports “Sub-Link” that aggregates bidirectional low speed signals, such as GPIO. Mirrored video signal redundancy can be used for troubleshooting system problems, or for applications that require a secondary application processor that is distant from the source video camera.

“This chipset will give more freedom to designers for leading edge technologies, such as Autonomous and 3D visualizing,” said Tak Iizuka, Chief Solution Architect of THine. “The capability to support two V-by-One HS inputs enable new and exciting dual camera applications, like 3D recognition and XR devices that usually require multiple cameras.”

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