In previous columns, we covered several aspects of IoT design, including sensors, connectivity, software, and single-chip IoT architectures. In this part, we are exploring power requirements and optimization.
Power supply brings a unique challenge to self-contained IoT nodes, especially when they need to meet the “ALWAYS ON” requirement. After all, a system is wireless only while the power lasts. IoT devices rely on batteries or energy harvesting to power them through day and night. Therefore, engineers need to take particular care when designing a product to minimize power consumption.
One way to approach this problem is to create a power budget broken out into specific tasks or circuit blocks. By allocating the power budget per task or circuit, designers have more information – and clarity – when it comes to selecting the components they need. Each component of an IoT system - including sensors, microcontrollers, and wireless connectivity – needs to be selected to create an ultra-low power implementation.
There are various factors that MCU vendors consider when optimizing an MCU for IoT applications, including:
- Improving the technology node
- Providing highly flexible power modes
- Enabling power-optimized hardware IP blocks
- Using flexible, low-power signal chains and analog front ends
- Integrating essential features into a single chip
- Supporting comprehensive operating voltage ranges
- Optimizing Flash access
- Energy harvesting
The process technology used to manufacture an MCU is critical to determining its performance, low power capabilities, and cost. IoT applications require both efficient active power consumptions and low-power mode consumptions for overall power efficiency of the system. Continuing advancements in manufacturing technology have led to shrinking die size. Performance and power are directly impacted by die shrinking. Shrinking a die reduces the current required to switch each transistor on/off while maintaining the same clock frequency. As a result, smaller chips have lower power consumption with increased frequency headroom leading to higher performance. Unfortunately, while shrinking the process technology improves performance, power, and integration, it introduces the challenge of managing leakage currents, especially when operating in low power modes. A tradeoff between active and low power mode current consumption must be made based on the end application.
In a previous column – radio and the computer – we explored why it’s better to use computing and connectivity that is just powerful enough for your application, as jumping to a higher tier may come with significant increases to power consumption. Even with a seemingly optimized system, computing and connectivity may not always be required. In such cases, it’s a no-brainer to use the low power modes provided by the SoC vendor. The availability of flexible power modes enables developers to schedule individual system events such that the overall power consumption is optimized. An essential technique is to provide multiple peripherals that can operate in low power modes, and that can be woken up to perform their function without having to wake the CPU. When considering the power modes of an MCU, it is important to look beyond the base architecture. For example, the standard ARM CPU core supports Active, Sleep, and Deep Sleep. MCU suppliers often add additional power modes to further enhance power optimization. Some MCUs also provide a particular low power active mode to make peripherals available for operation with limited features (such as lower operating frequency and voltage) and lower power consumption.
The sensing subsystem can also benefit from creative power optimization techniques. For example, using an ADC at the minimum required sampling rate rather than oversampling. Many simple ended conversions may be cleverly completed with fewer differential conversions in resistance ladder-based measurements. In addition to decreasing power usage, these techniques also reduce the common mode noise.
Modern opamps and other linear integrated circuits come with reduced supply voltage and enable pins. This allows the system the ability to turn off analog front end/signal chains when its operation is not required. SoCs with integrated signal chains or programmable analog blocks offer even more flexibility. In programmable systems on chip, opamps can operate in a deep sleep power mode with very low active current, albeit at the tradeoff of reduced bandwidth. This technique is a considerable boost for always-on, DC to low-frequency signal chains.
Similar to the features offered by programmable analog, SoCs with programmable digital enable the system to offload simple digital tasks to programmable I/Os. This allows the CPU to remain in deep sleep while these tasks are taken care of. Without such programmable digital, the CPU would have to become active to perform these tasks directly.
Another element that impacts power consumption significantly is non-volatile (NV) memory access. This is true in particular for MCUs where Flash is used to store firmware code. Any optimization in Flash access results in substantial power reduction. The objective is to minimize the frequency of Flash access. There are two conventional techniques applied here. One method is to provide a cache memory. In this way, the actual code memory (Flash) does not need not to be accessed for every cycle of execution. As the cache requires less power to access, this will significantly impact active power consumption. Another method is to increase the amount of data fetched each cycle. Using broader Flash access reduces Flash access frequency and reduces power consumption.
IoT-based MCUs may also provide a flexible power system. By supporting a wide supply voltage range, the MCU can be powered using multiple sources. For example, a simple IoT application such as a fitness tracker can be powered by a coin cell, while complex IoT applications such as smartwatch can be powered by PMICs (Power Management Integrated Circuits). Some MCUs offer an internal buck converter to regulate the power efficiently.
Energy harvesting is the process by which energy is derived from the operating environment such as light, heat and mechanical energy. From a system-level perspective, energy harvesting can be a game-changing alternative to always drawing power from batteries. Energy harvesting is viable when a tiny amount of power is required for ultra-low energy systems. Solar modules are the most popular energy harvesting solution since they are readily available, easy to use, and low cost. However, with wearables such as smart shoes that are continuously exposed to motion, piezoelectric and electromagnetic kinetic energy harvesting become attractive as they can generate large amounts of power with higher voltages. A thermoelectric generator is an excellent option in industrial applications for generating power from heat. Although energy harvesting provides “free” energy, it requires carefully designed electronics to provide a constant supply to the IoT node from a varying energy source.
In the next column, we will extend our exploration on IOT power optimization with the help of a real example - Stay Tuned!
Jaya Kathuria Bindra works as an Applications Manager at Cypress Semiconductor Corporation where she is managing the Embedded Applications Group and Solutions Development using the PSoC platform. She has 14+ years of experience in the Semiconductor Industry. She earned an executive management credential from IIM, Bangalore and holds BS in Electronics Engineering from the Kurukshetra University.
Nidhin MS works as a Staff Applications Engineer at Cypress Semiconductor Corporation. He has seven years of technical experience with analog, power electronics, touch sensing, embedded computing and connectivity and holds a bachelor’s degree in Electronics and Communication Engineering.