Renesas Launches Low-Power Technology for Embedded Flash Memory Based on SOTB™ Process

June 13, 2019 Laura Dolan

Renesas’ new low-power technology for use in embedded flash memory based on a 65 nanometer (nm) SOTB™ process is available with 1.5 MB capacity and has embedded 2T-MONOS flash memory based on 65nm SOTB technology.

Renesas achieves read energy as low as 0.22 picojoules per bit (pJ/bit) at a running frequency of 64 MHz with the supplementation of a new circuit technology that minimizes the power consumption of the peripheral circuits on flash memory.

The new embedded flash memory technology includes:

  • Low-power 2T-MONOS flash memory conducive for the SOTB process
  • Sense amplifier circuit and regulator circuit technology for ultra-low energy consumption
  • Circuit technology that significantly reduces data transmission energy consumption

For more information, visit renesas.com.

Previous Article
Renesas Processing-In-Memory Technology Delivers 8.8 TOPS/W AI Performance

A ternary SRAM structure, SRAM circuits that read memory at low power, and technologies to mitigate manufac...

Next Article
Pentek’s 3U VPX Board Optimizes Optical and RF I/O Connectivity

Pentek introduced the latest member of the Jade family of high-performance 3U VPX boards.