If I could give you a new technology that would increase your security levels, lower your power consumption, improve performance, and reduce your BOM, you’d probably say I was a fibber (or maybe some other choice words). Well, how about I invite you to an event where you can witness the technology for yourself, where you can see first-hand whether this is something you should be aware of.
On April 1-4, the RISC-V Foundation is hosting a series of free workshops to expose the design/development community to this potentially game-changing technology. The workshops will be held in the Boston area (Waltham) on April 1, Austin on April 2, Irvine on April 3, and Milpitas on April 4, running from 8:30 AM through lunch (or as long as attendees have questions to be answered).
The agenda consists of presentations from eight RISC-V Foundation member companies:
- Security expert Hex Five, who will discuss RISC-V security, with a comparison to Arm’s TrustZone;
- IC vendor Microchip Technology, who will show how to add real-time Linux using an SoC FPGA;
- Software services and tooling company Antmicro, who will discuss hardware-software co-design with the open-source Renode framework;
- IP vendor Andes Technology, who will use custom instructions to take RISC-V to high-performance sockets;
- Software tool vendor Imperas, who will discuss custom instructions and architecture optimization;
- Security professional Dover Microsystems, who will discuss RISC-V-specific security;
- Chip manufacturer Western Digital, who will detail the company’s production-grade, open-source RISC-V core;
- IP vendor SiFive, who will discuss intelligent Edge applications.
Why attend? The easy answer is, if you don’t know about RISC-V and you may have heard of it but want to learn more, this is the place for you. So obviously awareness is key. But it goes way beyond that. You’ve likely read about how RISC-V is changing the way that hardware will be designed going forward. Yes, I know you’re skeptical, and that’s a good thing.
Here’s the real-world example: as a software engineer, RISC-V gives you far more influence over your hardware brethren than ever before because, from your vantage point, you can see that certain instructions get executed far more than others. The easiest way to maximize performance is to have the hardware team optimize those instructions and achieve greater performance and/or lower power.
At the workshop, you’ll meet folks who have first-hand knowledge of such scenarios and what the outcomes are. These talks could help you get started in your development almost immediately. For example, with Microchip’s PolarFire SoC, which works in tandem with Antmicro’s Renode development tool, there’s a promise of immediate gratification.
Are you concerned about security? If not, you should be. While you won’t learn everything you need to know in just a couple of hours, you’ll certainly know what questions you should be asking and you’ll be starting out on the correct path to a secure design. Hex Five and Dover Microsystems are recognized experts in this space, not just within the RISC-V Foundation, but in all of the embedded/industrial industries.
Finally, the expert presenters have all pledged to remain on-site until all questions are answered. It’s not often you get an opportunity to network with this caliber of professionals, covering every aspect of a RISC-V-based design. Bring your questions and an open mind.
Calista Redmond is the newly appointed CEO of the RISC-V Foundation, most recently serving as a Vice President for IBM’s Z Ecosystem.