As SEGGER strengthens its position within the RISC-V instruction set architecture, the company announced its J-Link probes deliver support for the new SiFive Insight debug/trace solution. The support includes SiFive's latest Nexus-based trace implementation.
"The continued support from SEGGER is a great asset to the RISC-V ecosystem, and the swift adoption of SiFive Insight is of great benefit to chip designers," said SiFive director of product marketing Drew Barbier, in a press release. "SEGGER has supported SiFive Core IP since 2017 and continues to be a valued partner in the expansion and adoption of RISC-V for embedded solutions. We look forward to continued cooperation as the RISC-V ecosystem continues to grow and evolve."
Some features of the SEGGER debug probes is a backtracing capability, code coverage, and profiling. According to the company, Ozone debug software package can subsequently generate detailed code coverage reports for software validation purposes.
For more information, visit https://www.segger.com/risc-v.
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