Renesas Introduces Scalable AI SMARC SoM Solution for Accelerating Time to Market of HMI and Embedded Vision Systems

November 16, 2020 Tiera Oliver

Renesas Electronics introduced a scalable System-on-Module (SoM) Smart Mobility ARChitecture (SMARC) board solution comprised of 10 Renesas ICs, including microprocessor (MPU), power, and analog ICs.

The board solution is designed to speed the development of artificial intelligence (AI) IoT face/object detection, image processing, and 4K video playback applications, including surveillance cameras, inspection equipment, and a range of industrial and building automation HMI and embedded vision systems.

The Renesas scalable SoM board is based on the SMARC 2.0 industry standard, which specifies an 82mm x 80mm form factor. The SMARC SoM board offers designers a choice of three different scalable versions of the Renesas 64-bit RZ/G2 MPU: a RZ/G2N dual core Arm Cortex-A57 MPU operating at 1.5 GHz for mid-range performance; the RZ/G2M MPU with dual-core Arm Cortex-A57 and quad-core Arm Cortex-A53 (1.2 GHz) for ideal performance, and the RZ/G2H MPU with quad-core Arm Cortex-A57 and quad-core Arm Cortex-A53 for ideal performance. All three MPUs (two cores up to eight cores) feature integrated 600 MHz PowerVR 3D graphics and a 4K UHD H.265 and H.264 codecs to meet the needs of different computer processing requirements.

The SMARC SoM board offers designers their choice of RZ/G2 MPU with up to 35.6K DMIPS performance, plus 2GB to 4GB LPDDR4 RAM memory, and 32GB eMMC. Each RZ/G2 MPU is capable of running edge video analytics and AI frameworks. The MPUs feature an integrated AI software library, comprehensive set of interfaces, error checking, and correction (ECC) protection on both internal and external memories, Linux OS, and a Verified Linux Package (VLP) tested and maintained by Renesas. The solutions also feature Civil Infrastructure Platform (CIP) Super Long-Term Support (SLTS) kernel, and a Linux kernel bundled with a software development environment. The SMARC SoM board provides an optimized power and programmable timing tree to assist the RZ/G2 MPU with a variety of applications.

Key Features of the SMARC 2.0 SoM Board

  • Supports dual-band Wi-Fi and Bluetooth Low Energy (BLE) for wireless communication
  • Ideal communication interfaces such as USB, SATA, LVDS, HDMI, CSI, I2S, PCIe, and Gigabit Ethernet are accessible through the SMARC 2.0 connector;
  • Ideal start up boot from QSPI or eMMC memory;
  • Features ISL1208 low-power real time clock for calendar-based applications powered by a 400nA battery, or supercapacitor during a power failure;
  • Features P8330 power management IC (PMIC) for delivering power to multiple supply rails;
  • Two clock sources supplied by Renesas small form factor VersaClock 3S programmable clocks with integrated 32.768kHz DCO powered by a single coin cell battery during a power failure;
  • PCIe clock is generated with the Renesas 9FGV0641 supporting six 100 MHz differential clock outputs, with PCIe Gen 1-4 support;
  • Ideal connection to two external cameras and LCD panel with capacitive touch.

The Scalable AI SMARC SoM Solution board was designed by Renesas and developed through a collaboration with RelySys Technologies.

The Scalable AI SMARC SoM Solution Board and design files are available from Renesas’ worldwide sales and global distribution partners.

For more information, visit: SMARC SoM Winning Combo Solution.

About the Author

Tiera Oliver, edtorial intern for Embedded Computing Design, is responsible for web content edits as well as newsletter updates. She also assists in news content as far as constructing and editing stories. Before interning for ECD, Tiera had recently graduated from Northern Arizona University where she received her B.A. in journalism and political science and worked as a news reporter for the university's student led newspaper, The Lumberjack.

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