Rambus Announces PCI Express 5.0 Interface Solution

By Perry Cohen

Associate Editor

Embedded Computing Design

January 03, 2020

News

Rambus Announces PCI Express 5.0 Interface Solution

Rambus, a silicon IP and chip provider, announced it now offers a comprehensive and optimized interface solution designed for PCI Express (PCIe) 5.0, with backward compatibility to PCIe.

Rambus, a silicon IP and chip provider, announced it now offers a comprehensive and optimized interface solution designed for PCI Express (PCIe) 5.0, with backward compatibility to PCIe 4.0, 3.0 and 2.0.

The Rambus PCIe 5.0 interface solution includes both PHY and digital controller for easy SoC integration and faster time to market, according to the company. With the PHY designed for an advanced 7nm process node, the integrated solution offers best-in-class power, performance and area.

In addition to the state-of-the-art PHY, the Rambus PCIe 5.0 solution includes a high-performance, digital controller core from recently acquired Northwest Logic. The Rambus PHY and controller are offered as a fully validated and integrated solution, or they can be licensed separately and used with third-party solutions. The entire solution is backed by Rambus design, integration and support services for first-time customer success.

For more information, visit https://www.rambus.com/rambus-announces-pcie5-interface-solution/

Perry Cohen, associate editor for Embedded Computing Design, is responsible for web content editing and creation, podcast production, and social media efforts. Perry has been published on both local and national news platforms including KTAR.com (Phoenix), ArizonaSports.com (Phoenix), AZFamily.com, Cronkite News, and MLB/MiLB among others. Perry received a BA in Journalism from the Walter Cronkite School of Journalism and Mass Communications at Arizona State university.

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