OneSpin Exhibits First Formal RISC-V Integrity Verification Solution at Embedded World

February 25, 2019 Katelyn Albani

MUNICH, DE and SAN JOSE, CA. OneSpin will highlight the RISC-V Integrity Verification Solution during embedded world in Nuremberg, Germany from February 26-28 and can be found in Hall 4, Booth 560.

OneSpin Solutions just released its RISC-V Integrity Verification Solution for development and assessment of RISC-V cores, leveraging its advanced formal verification expertise for automotive and other high-integrity processor applications.

The RISC-V Integrity Verification Solution includes:

  • core implementations
  • benefits
  • submission with the ISA specification
  • privileged ISA
  • Control and Status Registers
  • exception mechanism and other extensions

“Even though past efforts have failed to achieve 100% proof, verification of an instruction set architecture’s conformance is a natural fit for formal technology,” remarks OneSpin’s product manager for design verification, Sven Beyer. “Our RISC-V integrity Verification Solution converges for all properties on real-world implementations, a valuable resource to the many users trying to meet this processor standard.”

For more information, please visit

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