Imagination Technologies announced the completion of a new course focused on RISC-V computer architecture for undergraduate teaching as part of its Imagination University Programmer (IUP).
The course, titled “RVfpga: Understanding Computer Architecture,” includes teaching materials and exercises to provide students an understanding of the elements of processor architectures. This includes IP cores, modifying a RISC-V core, and microarchitectures.
“RISC-V is transforming processor design and software/hardware co-design. RISC-V is an open architecture, which enables open-source hardware implementations,” said professor David Patterson, in a press release. “This new option means that software development can occur alongside hardware development, accelerating the design path. The RVfpga course enhances the understanding of not only RISC-V processors but also the RISC-V ecosystem and RISC-V SoCs.
“This course provides a deep understanding of an industrial-strength processor architecture and system of increasing popularity, which will prove useful to students throughout their academic and industry careers.”
The course was created with academic partners that include Associate Professor Sarah Harris, co-author of the “Digital Design & Computer Architecture” textbook and Associate Professor Daniel Chaver.
The course includes instructor’s guide, a student manual, 10 comprehensive Labs (hands-on experiments), test materials, sample exam questions, and all the associated IP and software.
For more information, visit https://university.imgtec.com/.
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