Agnisys to Demonstrate Solutions For RISC-V System Development at RISC-V Summit 2019

December 10, 2019 Perry Cohen

Agnisys will present its SoC design and intellectual property (IP) solutions at the RISC-V Summit in San Jose, Dec. 10-12.  The company will focus on showcasing how IDesignSpec along, with ARV and ISequenceSpec, enable software, hardware, verification, and validation engineers to accelerate their IP/SoC development cycle and mitigate the risk for first pass silicon.

They will showcase a flow using Agnisys software tools, wherein hardware and software teams can collaborate efficiently to easily create RISC-V based IPs/SoCs targeting both ASICs and FPGAs.  Using IDesignSpec along with ARV, they will demonstrate how design teams can automatically generate the RTL from a golden register specification along with C-headers, UVM verification environment and virtual prototyping models for a variety of platforms and bus fabrics such as TileLink, AMBA® AXI, AMBA® AHB, AMBA® APB, Avalon® and custom.
The RISC-V summit in San Jose brings together RISC-V technology users, developers, and industry experts for three days of networking, sharing best practices on critical design and verification issues, discovering new techniques for designing advanced silicon, SoCs, and systems based on the RISC-V processor.
For more information, visit

About the Author

Perry Cohen

Perry Cohen, associate editor for Embedded Computing Design, is responsible for web content editing and creation in addition to podcast production. He also assists with the publication’s social media efforts which include strategic posting, follower engagement, and social media analysis. Before joining the ECD editorial team, Perry has been published on both local and national news platforms including (Phoenix), (Phoenix),, Cronkite News, and MLB/MiLB among others. Perry received a BA in Journalism from the Walter Cronkite School of Journalism and Mass Communications at Arizona State university. He can be reached by email at <a href=""></a>. Follow Perry’s work and ECD content on his twitter account @pcohen21.

Follow on Twitter Follow on Linkedin More Content by Perry Cohen
Previous Article
Keysight Infiniium S-Series Oscilloscopes Now Available from Newark
Keysight Infiniium S-Series Oscilloscopes Now Available from Newark

Newark, a Development Distributor, announced a new line of Keysight Technologies oscilloscopes, the Infinii...

Next Article
LoRaWAN Gateway for the Internet of Things
LoRaWAN Gateway for the Internet of Things

ICP Germany has launched UG85, an indoor LoRaWAN gateway. The UG85 is equipped with a 64-bit ARM Cortex A-5...