Adesto will Display Latest in Custom ASIC and Memory Solutions at Arm TechCon

October 11, 2018 Laura Dolan

Adesto Technologies will demonstrate its innovative custom ASIC and non-volatile memory (NVM) solutions in booth #1020 at Arm TechCon.                          

Their SmartEdge platform provides ways to integrate sensing, calibrating, controlling and communication functions into a single ASIC for edge computing in a cost-effective manner. As a result, PCB area and power consumption will be up to 75% less and BOM cost 80% less.

Their octal EcoXiP memory solution eliminates barriers for mass market eXecute-in-Place (XiP) applications by delivering the best performance, power efficiency, and cost metrics.

Adesto will present in the following sessions:

  • “Optimizing System Performance and Power in New MCU Architectures,” by Adesto’s Chief Technology Officer Gideon Intrater. He will discuss new memory architectures that enable designers to satisfy performance/power requirements of emerging intelligent IoT devices.
  • “Improving Memory on the Edge Using Octal Serial Flash Cache,” where Adesto and Arm will be joined by Silvaco experts. They will explore options for increasing the program memory on a device while preventing increasing cost and power or limiting performance.

Arm TechCon will be held October 16-18, 2018 at the San Jose Convention Center in San Jose, CA.

The Adesto session will be held at 9 a.m. on Tuesday, October 16th.

The Silvaco session will be held at 11:30 a.m. on Tuesday, October 16th.                           

To schedule a demonstration or personal briefing, please email

For more information, visit:

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