Metrics Technologies and Concept Engineering, specialists in visualization and debugging technology for electronic circuits and systems, today reached agreement for Concept Engineering′s RTLvision® PRO to be integrated within Metrics’ flexible cloud-based open platform ecosystem.
"Metrics is proving that a robust cloud-based open platform delivers the performance, scalability and competitive pricing to improve resource utilization and engineering productivity," remarks Gerhard Angst, CEO and president of Concept Engineering. "We welcome the opportunity to join Metrics in moving complex chip design verification to the cloud."
Adding RTLvision® PRO to the Metrics Platform increases the platform’s capabilities to enable chip design engineers to identify and correct register transfer level (RTL) code for higher-quality designs delivered on time and within budget.
A high-performance and data-driven simulation flow such as the Metrics Platform manages big simulation data across regression environments. Integrating RTLvision for advanced debugging, visualization and analyzing waveforms gives chip design verification engineers detailed schematics of violated circuit paths, design hierarchy, clock and reset logic. They can visualize waveforms through analysis engines to expose circuit behaviors, and pinpoint functional logic, clock and reset problems for faster debug and cross-probe from schematic to SystemVerilog source code to quickly fix detected problems.
“Concept Engineering has a notable 29-year history as the market leader for schematic generation and viewing technology, and continues to remain at the forefront of technology and innovation,” says Doug Letcher, Metrics’ president and CEO. “Adding its visualization and debugging tools to our open platform ecosystem gives our users exceptional capabilities to complete their projects.”
Concept Engineering’s RTLvision runs on the Metrics Platform using the same software-as-a-service (SaaS) pricing model.
Metrics’ partnership with Concept Engineering follows earlier partnerships established with Google Cloud, Avery Design Systems and Test and Verification Technologies (T&VS). Avery’s Verification Intellectual Property (VIP) runs on the Metrics Platform, while T&VS accesses the Metrics Platform to manage and leverage big simulation data to run global verification projects, all on Google Cloud.
The Metrics Platform will demonstrated during DVCon 2019 (Booth #1102) Monday, February 25, through Wednesday, February 27, at the DoubleTree Hotel in San Jose, Calif. To learn more, visit www.metrics.ca
About Concept Engineering
Concept Engineering is a privately-held company based in Freiburg, Germany, that provides visualization and debugging technology for electronic circuits and systems, including automatic schematic generation technology for all major design levels. The company′s technology helps electronic design engineers to easily understand, debug, optimize and document electronic designs. Concept Engineering′s software technology is used in many fields in the EDA market, including: RTL development, IP reuse, ASIC and SoC design, FPGA design, analog/mixed-signal design, logic synthesis, design verification, test automation, post-layout analysis, debugging and visualization at system level, RTL level, netlist level and transistor level.
Metrics, headquartered in Ottawa, Ontario, Canada, is the first true cloud-based platform for ASIC and complex FPGA Design Verification. The Metrics Platform provides an infinitely scalable design verification workflow, which reduces infrastructure waste and enables better engineering efficiency.
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SpiceVision PRO, GateVision PRO, RTLvision PRO, and StarVision PRO are registered trademarks and Nlview, NlviewJS, T-engine and S-engine are trademarks of Concept Engineering GmbH in the United States and other countries. Metrics and Concept Engineering acknowledge trademarks or registered trademarks of other organizations for their respective products and services.