MIPI Alliance Announces Availability of MIPI Debug for I3C v1.0

By Perry Cohen

Associate Editor

Embedded Computing Design

October 01, 2020

News

MIPI Alliance Announces Availability of MIPI Debug for I3C v1.0

The MIPI Alliance announced the availability of MIPI Debug for I3C v1.0, a scalable debug and test specification for 5G, IoT, and automotive systems, among others.

The MIPI Alliance announced the availability of MIPI Debug for I3C v1.0, a scalable debug and test specification for 5G, IoT, and automotive systems, among others.

The specification, which is built on the MIPI I3C v1.1 and MIPI I3C Basic v1.0 utility and control bus. This allows designers to debug and test processors, power management ICs, and modems with the low-bandwidth MIPI I3C interface.

“MIPI Debug for I3C overcomes the limitations of current low-bandwidth solutions available in the market and delivers a simple interface scalable and flexible enough for use in scenarios throughout a product's lifecycle,” said chairman of MIPI Alliance Joel Huloux, in a press release. “In leveraging and expanding the applications of the MIPI I3C interface, MIPI continues to fuel the growth of a rich development ecosystem around standardized debug and trace, translating into greater interoperability and capabilities, and cost advantages for OEMs, silicon providers and system developers.”

Interfaces like JTAG, cJTAG, I2C, and UART can impose limitations on accessibility of debug components and devices. MIPI Debug for I3C overcomes the limitations by leveraging MIPI I3C v1.1 features. Further, it allows for multi-component connectivity across debug or shared bus topologies, only requires two wires, supports multiple entry points, and maintains a network even if components are being powered down.

Per the release, the interface transports debug controls and data between a debug and test system (DTS) and a target system (TS). The TS exposes multiple debug interfaces/ports from a single physical connection, and the DTS then sends broadcast or directed action requests (halt, reset, etc.).

By leveraging the multi-drop, two-wire architectures and common command codes hot-join ability, debug for I3C supports the following:

  • Defining debug specific CCCs for configuration, function selection and action/event triggers and interrupts
  • Assigning specific Mandatory Data Byte (MDB) values to indicate debug IBIs
  • Standardizing data-exchange mechanisms for predefined port-based communication

MIPI is hosting a webinar October 21 to discuss the features and benefits. For more information, visit https://bit.ly/3kZpLyg.

Perry Cohen, associate editor for Embedded Computing Design, is responsible for web content editing and creation, podcast production, and social media efforts. Perry has been published on both local and national news platforms including KTAR.com (Phoenix), ArizonaSports.com (Phoenix), AZFamily.com, Cronkite News, and MLB/MiLB among others. Perry received a BA in Journalism from the Walter Cronkite School of Journalism and Mass Communications at Arizona State university.

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