Pentek introduced the latest member of the Jade family of high-performance 3U VPX boards. The Model 54851 is based on the Xilinx Kintex Ultrascale FPGA, and features two 500MHz 12-bit A/Ds with two programmable multiband digital downconverters, one digital upconverter and two 800MHz 16-bit D/As.
“Recent enhancements to OpenVPX have greatly improved I/O capabilities,” according to Robert Sgandurra, director of Product Management. “These enhancements play well into Pentek’s modular approach to product design by offering optical and RF options for high-performance I/O that perfectly match our product capabilities.”
The Model 54851 offers these VPX I/O options for RF and optical interconnects:
• Option -110: Optical connections based on VITA 66.5 (draft), containing blind-mate MT optical connectors with fixed contacts on the plug-in module and floating displacement on the backplane.
• Option -111: RF connections based on ANSI/VITA 67.2, containing multi-position blind-mate analog connectors with SMPM contacts.
• Option -112: RF connections based on ANSI/VITA 67.3 type C, containing multi-position blind mate analog connectors with SMPM contacts, spring-loaded on the backplane allowing more movement and larger diameter cables for better performance.
Future options for higher density optical and RF connectors are planned as the supporting standards become available. Organizations such as The Open Group Sensor Open Systems Architecture (SOSA™) Consortium are specifying additional types and apertures for VITA 67.3.
The Model 54851 can be populated with a range of Kintex UltraScale FPGAs to match specific requirements of the processing task, spanning from the KU035 (with 1,700 DSP slices) to the KU115 (with 5,520 DSP slices). The Model 54851 also includes a complete multi-board clock and sync engine and a large DDR4 memory. In addition to supporting PCI Express Gen. 3 as a native interface, the Model 54851 includes optional high-bandwidth connections to the Kintex UltraScale FPGA for custom digital I/O.
The Pentek Jade architecture is based on the Xilinx Kintex UltraScale FPGA and its PCI Gen.3 interface allows access to control and status registers for controlling algorithms, state machines, and data flow across the LVDS I/O front panel and carrier board interfaces. A 5 GB bank of DDR4 SDRAM is available for additional functions. The factory-installed DMA controller can sustain 6.4 GB/s data transfers across PCIe.
Designed for air-cooled, conduction-cooled and rugged operating environments, the Model 54851 XMC module with 5 GB of DDR4 SDRAM starts at $12,595 USD. Delivery is 10 to 12 weeks ARO. The Navigator Design Suite consists of two packages. The Navigator BSP is $2,500 USD and the Navigator FDK is $3,500 USD.
For more information, visit www.pentek.com.