Optima Design Automation today rolled out its next-generation Optima Safety Platform, (OSP), based on its Fault Injection Engine (FIE™) technology. OSP includes Optima's first two automated solutions: Optima-HE™ and Optima-SE™ for hard-error and soft-error analysis, respectively. By increasing fault analysis performance by orders of magnitude over the next fastest solution, Optima offers its customers a reduction in analysis time from months to days, as well as automated coverage improvement and design safety.
OSP has been shown in private benchmarks to increase fault analysis performance more than two orders of magnitude over its nearest rival. To date, fault analysis of large automotive safety critical devices, as stipulated by the ISO 26262 standard, can require months of compute time to perform. By reducing this time to a matter of days or hours, new forms of analysis can be performed that dramatically improve device safety and quality while ensuring an accurate measure of fault resistance. The addition of Optima's automated CoverageMaximizer™ technology allows for design areas not analyzed during verification to be easily eliminated, further improving the analysis process.
"Up to now, automotive ISO 26262 fault analysis has made use of traditional, slow fault simulation technology designed for a different purposes, using 30-year-old algorithms and methods," noted Jamil Mazzawi, Optima's Founder and Chief Executive Officer. "We have taken an entirely new approach to this problem, building the fault-simulation algorithms from the ground up to realize dramatic improvements in this time-consuming process. This has opened the potential for new analysis solutions that allow previously unavailable operations to be performed that maximize functional safety coverage and ultimate device quality."
Optima Fault Injection Engine Technology
The only tool available for safety fault analysis has been traditional fault simulation, a 30-year-old technique that was designed to target semiconductor manufacturing testing. Optima's engineering team has developed a new, proprietary set of fault analysis algorithms that specifically targets safety analysis fault injection.
By leveraging modern parallel simulation and formal verification technologies, avoiding issues caused by manufacturing fault simulation requirements, and taking a new slant on fault optimization methods such as fault list pruning and collapsing, the FIE provides revolutionary analysis performance. One private benchmark of the FIE versus the broadly considered fastest rival fault simulator on a commercial design showed the FIE executing more than 1000X faster.
Optima has used the FIE technology as a basis on which to build specialized solutions for different fault scenarios
Optima-HE and Optima-SE Automated Analysis Solutions
The Optima Safety Platform includes a broad range of fault analysis solutions for different applications and industries. Its two initial solutions that target ISO 26262 automotive safety fault analysis provide streamlined solutions for hard errors, or permanent faults, and soft errors, or transient faults.
Optima-HE uses the FIE to perform exhaustive fault analysis for stuck-at-1 and stuck-at-0 hard-errors. Based on the ISO 26262 standard categorization, the solution identifies dangerous faults in a design that are not trapped by a safety mechanism and could cause a significant failure that might lead to personal injury. It analyzes large design code bases extremely rapidly, reducing a process that used to require months down to a few days or less. This enables development teams to predict an accurate metric for fault coverage that makes an ASIL-D rating for their devices possible. Furthermore, Optima-HE includes CoverageMaximizer technology that identifies areas of the device not adequately tested and provides guidance for the engineers to cover these hard-to-find gaps in the process.
Optima-SE also uses the FIE to perform soft-error analysis on transient faults. Transient faults are notoriously hard to identify due to their temporary nature. A technique of "flip-flop hardening" for critical areas of the design may be used to eliminate transient fault effects. However, hardening every flip-flop in a design is extremely expensive in terms of silicon area and power consumption. By iteratively applying fault analysis it is possible to identify a subset of the design flips-flops, which if hardened will ensure a high degree of transient fault resistance while minimizing additional flip-flop circuitry. However, this valuable process requires many fault analysis runs making it prohibitive for most device development programs. Leveraging the high performance of the FIE, Optima-SE makes this process possible in a reasonable amount of time, thereby dramatically increasing device quality. Running on a customer design of a commercially available CPU, Optima-SE has been shown to run over 10,000 times faster than regular RTL simulation.