Moortec, a leading provider of in-chip monitoring and optimisation IP, today announced the availability of its latest In-Chip Monitoring IP Subsystem on TSMC's N5 and N5P process technologies.
A global acceleration in cutting-edge technologies including 5G, Artificial Intelligence (AI), Machine Learning and Data Centre High Performance Computing is fuelling the demand on TSMC's 5nm FinFET process technology. Such devices are required to operate at the highest level in terms of power, speed performance and reliability, which is why in-chip monitoring has become such an essential part of the system design. Moortec's focus on in-chip innovation continues to help the advanced node IC development community push the limits of what is possible at these advanced nodes, enabling tomorrow's technology to become a reality.
"We are immensely proud to be engaging with customers, and providing a complete IP monitoring solution to the 5nm design community," said Stephen Crosher, CEO of Moortec. "For the type of cutting-edge designs synonymous with 5nm process, highly accurate, highly featured in-chip sensing fabrics have now become a necessity, not only for optimising performance and increasing reliability of the device but also in terms of managing the associated costs and risks. Our long-term collaboration with TSMC has enabled us to provide our customers with an innovative, early to market range of monitoring IP."
"TSMC's most advanced N5 and N5P process technologies greatly address the customer's growing demands on increased computing power for leading-edge mobile and high performance computing applications," said Suk Lee, TSMC Senior Director, Design Infrastructure Management Division. "We're pleased with the result of our collaboration with Moortec in making Moortec the first to market with a 5nm embedded monitoring solution, which enables our mutual customers to develop and unleash their optimized design innovations."