Imagination Launches IMG B-Series

October 26, 2020 Tiera Oliver

Imagination Technologies announced the IMG B-Series, a new expanded range of GPU IP. Per the company, featuring advanced multi-core architecture, B-Series enables Imagination customers to reduce power while reaching higher levels of performance than any other GPU IP on the market.

Also, per the company,  the GPU IP delivers up to 6 TFLOPS of compute, with an up to 30% reduction in power and 25% area reduction over previous generations and up to 2.5x higher fill rate than competing IP cores.

B-Series is designed to deliver ideal performance per mm2 for GPU IP while offering new configurations for lower power and up to 35% lower bandwidth for a given performance target.

B-Series offers a range of configurations to expand the options available for our customers. It is an ideal solution for multiple markets such as mobile (premium to entry-level), consumer, IoT, microcontrollers, DTV, and automotive. The new multi-core offerings also enable IMG BXT to reach data center levels of performance.

B-Series also contains the first ISO 26262-capable cores with IMG BXS providing a wide range of options for automotive; from small, safety-fallback cores, to multiple teraflops of compute for advanced driver-assistance systems (ADAS) and high-performance autonomy.

The new multi-core architecture has been optimized for each of the product families with BXT and BXM cores featuring multi-primary full-core scaling, combining the power of all of the cores to deliver maximum single-app performance or optionally enabling the cores to run independent applications.

BXE cores offer primary-secondary scaling, an area-optimized solution that presents a single high-performance GPU, while making use of our HyperLane technology for multitasking.

BXS Automotive cores also feature multi-core with a multi-primary design enabling performance scaling as well as safety checks to be performed across cores to confirm correct execution.

IMG B-Series also includes IMGIC, an advanced image compression technology to provide new bandwidth saving options for our customers. It offers up to four levels of compression, from pixel-perfect lossless modes to an extreme bandwidth-saving mode, which offers a guaranteed 4:1 or better compression rate. This gives more flexibility for SoC designers to optimize either for performance or to reduce system cost while maintaining an ideal user experience. IMGIC is compatible with every core across the B-Series range.

IMG B-Series is available in four product families that offer specialized cores for specific market needs: 

  • IMG BXE: Driving beautiful high-resolution displays - From 1 up to 16 pixels per clock (PPC) BXE scales from 720p to 8K with a range of GPUs specifically designed for UI rendering and entry-level gaming. BXE offers up to 25% area saving compared to previous generation cores and up to 2.5x the fill rate density compared to the competition.
  • IMG BXM: Incredible graphics experiences - A range of high-efficiency performance cores providing an optimal balance of fill rate and compute in a compact silicon area for mid-range mobile gaming and complex UI solutions for DTV and other markets.
  • IMG BXT: Unprecedented performance - Offering incredibly high performance for real-world applications, scaling from the device in your hand to the data centre. The flagship B-Series GPU is a four-core part generating 6.0 TFLOPs of performance, 192 Gigapixels per second and 24 TOPS for AI, delivering the industry's highest performance per mm2.
  • IMG BXS: The future of automotive GPUs - The BXS family are ISO 26262-capable GPUs, making them the most advanced automotive GPU IP cores ever created. Available as a complete range from entry to premium, delivering solutions for next-generation HMI, UI display, infotainment, digital cockpit, surround view, through to multi-teraflop compute-focused configurations for autonomy and ADAS.

IMG B-Series is available today and already has lead licensees for every product family.

For more information, visit: https://www.imgtec.com/

About the Author

Tiera Oliver, edtorial intern for Embedded Computing Design, is responsible for web content edits as well as newsletter updates. She also assists in news content as far as constructing and editing stories. Before interning for ECD, Tiera had recently graduated from Northern Arizona University where she received her B.A. in journalism and political science and worked as a news reporter for the university's student led newspaper, The Lumberjack.

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