The CHIPS Alliance announced it released the Advanced Interface Bus (AIB) version 2.0 draft specification on GitHub. AIB standard is an open-source, royalty-free PHY-level standard for connecting semiconductor die in the same package.

2.0 has over 6x the bandwidth density of AIB 1.0 as there are increases in per-wire line rate and IO per channel numbers. Further, due to smaller microbumps, AIB 2.0 can half of the current microbump array area.

"The AIB 2.0 draft standard continues the CHIPS Alliance's efforts to provide comprehensive design resources to simplify hardware design and reduce development costs," said chairman of the CHIPS Alliance Dr. Zvonimir Bandi?, in a press release. "As companies increasingly rely on chiplets to keep up with the latest computing requirements and workloads for different applications, AIB will make it easier to integrate silicon IP with other chiplets into a single device to deliver new levels of functionality and optimization."

With support for AIB-enabled chiplets, developers can expand on traditional monolithic semiconductor manufacturing to leverage process nodes for each function within a design.

For more information, visit chipsalliance.org.