CEA-Leti Demonstrates Architecture for HPC Devices Using Gate-All-Around Nanosheet Fabrication Process
June 15, 2020
News
CEA-Leti demonstrated a fabrication of a gate-all-around (GAA) nanosheet device. The new device is to be used as an alternative to FinFET technology.
CEA-Leti demonstrated a fabrication of a gate-all-around (GAA) nanosheet device. The new device is to be used as an alternative to FinFET technology.
“We added specific modules for GAA structures on this FinFET route and we showed that for the same surface occupation we can propose an alternative to FinFET technology due to a gate-all-around configuration,” said CEA-Leti scientist Sylvain Barraud, in a press release. “In fact, GAA structures offer many advantages over FinFET, such as better gate control and higher DC performance, thanks to higher effective channel width. In addition, the wide range of variable nanosheet widths allows more design flexibility, which is not possible for FinFET because of its discrete number of fins.”
According to the release, researchers fabricated GAA nanosheet transistors with seven levels of stacked silicon channels, more than twice as many as state-of-the-art today, with widths ranging from 15nm to 85nm.
Barraud said CEA-Leti’s demonstration was based on a “replacement metal-gate” process developed for FinFET.
For more information, visit http://www.leti-cea.com/cea-tech/leti/english
Perry Cohen, associate editor for Embedded Computing Design, is responsible for web content editing and creation, podcast production, and social media efforts. Perry has been published on both local and national news platforms including KTAR.com (Phoenix), ArizonaSports.com (Phoenix), AZFamily.com, Cronkite News, and MLB/MiLB among others. Perry received a BA in Journalism from the Walter Cronkite School of Journalism and Mass Communications at Arizona State university.
