In part 1 of this series, we covered the importance of security in connected embedded systems and the dis-integration of Flash forcing the use of external Flash. In part 2 of this series, we covered Secure Flash, the next generation of smart memory. In this final part of the series, we will cover design issues related to secure embedded systems using external Flash.
Figure 4 shows how the intelligence built into secure Flash is able to deliver the performance, reliability, security and functional safety needed in embedded systems. Using standard bus protocols, including Quad Serial Peripheral Interface (QSPI) and Expanded Serial Peripheral Interface (xSPI), smart secure Flash can work with the host to achieve the security levels required in demanding connected applications while retaining full compatibility with existing host memory controllers.
For mission-critical applications where failure is not an option, secure Flash can assure a safe boot-up for the system, log critical information and extend working memory for essential functions. Examples of such “fail-safe” applications include Advance Driver Assistance System (ADAS), portable medical devices, factory automation, defense-level sensors and advanced wireless communication systems.
An essential aspect of being fail-safe involves encrypting the code and data stored to prevent it from being altered or otherwise compromised. By integrating cryptographic engines alongside the embedded processor, data can be stored in a secure manner. Given that the memory footprint typically dwarfs the number of gates required for a CPU and task-specific compute engines, cryptographic and other advanced capabilities can be implemented in smart secure Flash at a relatively low incremental cost.
Secure Flash creates a hardware-based root-of-trust that provides a Secure Environment or integrates with a TEE provided by a secure MCU. One vitally important role for the root-of-trust is ensuring the system will boot up properly, ideally based on the Trusted Computing Group’s Device Identifier Composition Engine (DICE) standard. The secure boot process affords end-to-end protection by mutually authenticating the Flash and the host MCU to ensure the confidentiality of all transactions traversing the bus. And because the Flash is smart, the authenticated boot can begin in less than the 100 milliseconds required by some applications.
The ability to securely update code to the latest version is equally important aspect of a secure boot process. This requires ensuring that Firmware Over-The-Air (FOTA) or other forms of updates be completed without any tampering or corruption, whether intentional or accidental. Should any tampering be detected through version attestation or some other means, a rollback protection feature can be used to restore the previous known-valid (albeit down-rev) version of code. This same capability could also be used to secure any device provisioning that might occur in unsecure manufacturing facilities or service centers.
Embedded intelligence empowers secure Flash to handle other tasks in addition to securing stored code and data. For example, support for eXecute-In-Place (XIP) functionality enables the secure Flash, as a trusted environment, to execute code directly, thereby offloading the host MCU. This can also help reduce cost and power consumption by reducing the amount of on-chip RAM the MCU needs.
The automotive and industrial automation markets are leading the adoption of secure Flash, driven by a need to satisfy the most demanding security and functional safety requirements. Because potential vulnerabilities in embedded systems can lead to remotely exploitable attacks that could consequently threaten the safety of the passengers or workers, functional safety in a system cannot be achieved without ensuring robust security. It is, therefore, a requirement that all semiconductor components (including external Flash devices) in safety-critical applications comply with the ISO26262 standard for Advanced Driver-Assistance Systems (ADAS) and IEC 61508 for industrial systems.
It is also critical to continuously monitor the health of the devices in the field, as well as to enable performing remote diagnostics and preventive maintenance. Flash devices are prone to several failure modes, including Flash cell failures due to charge loss or cosmic radiation, latency, power loss faults, etc., that need to be addressed to ensure high reliability over an operational life of 20 years or more.
The Future of Flash
Smart secure Flash is gaining acceptance as an alternative to eFlash, which is destined to become scarce or disappear entirely as process geometries shrink below 28nm. Chipsets that can integrate eFlash but need additional non-volatile memory dedicated to HSM functionality will also benefit from the advent of secure Flash. In both designs, secure Flash enables code and data to be transported between a protected area and the host MCU’s HSM over industry-standard buses in a cryptographically secure manner.
It is expected that designs incorporating secure Flash will become more common and even essential to meeting evolving security requirements. Attacks are becoming more pervasive and sophisticated. Regulations can be expected to become more stringent, and increased autonomy will further elevate the importance of security and functional safety. To meet these evolving needs while minimizing the time-to-market for new functionality, design engineers will increasingly rely on the agility only smart secure Flash can provide.
About the Author
Sandeep Krishnegowda is marketing and applications director of the Flash Business Unit at Cypress Semiconductor Corp. He has worked in Cypress’ memory products division for more than ten years in a variety of engineering, management and marketing roles. He earned an MS in Electronics and Communication from Rensselaer Polytechnic Institute and a BE in Electronics and Communication from Visvesvaraya Technological University.