SoCs: Thirst for smarter devices

March 1, 2008 OpenSystems Media

Every year the innovation behind Systems-on-Chip (SoCs) seems to make great strides forward. Semiconductor manufacturers are laying down more transistors, enabling designers to make more complex systems. As Intellectual Property (IP) blocks keep emerging, designers are gaining a bigger bag of parts to select from. Meanwhile, tool designers are innovating better ways for more effective SoC development. All these factors are helping produce affordable devices finely tuned to the application they were designed to serve, opening doors for SoCs to be used in even more devices.

IP everywhere

By far the most frequently used core architectures embedded in SoCs are the various ARM cores (see Figure 1). ARM Holdings ( reports that its cores were used in 80 percent of processors in 2006, with the highest growth projections in the automotive (39 percent), wireless (21 percent), and non-PC computing (23 percent) application segments. ARM has become so prevalent that at the ARM Developers Conference in October, the question, ìIs ARM becoming a commodity?î sparked a lively discussion during one of the panel sessions. The panel members agreed that although pure cores were showing signs of becoming a commodity, new innovation combined with proprietary IP make many of the SoC devices that spin out of ARM cores unique to each supplier.

Figure 1: ARM core family

ARM CEO Warren East states that ARM growth is coming from market penetration in embedded and automotive applications and from the market evolution of smart phones and new multimedia products. ARM continues to develop a core roadmap complemented by a large ecosystem that makes building an ARM-based SoC very attractive.

Cores from MIPS Technologies, Inc. ( are also used extensively in SoC designs (see Figure 2). One of MIPSí sweet spot market segments is digital home entertainment. MIPS was in right place at the right time when this market took off, offering middleware protocol stacks with cores at the right price/performance ratio. A large supporting ecosystem that lowers barriers to entry makes it easier to design in MIPS-based SoCs. Krishna Anne, MIPS director of product marketing, notes that the 24K and 34K devices are most commonly used in mass market production, while the lower-end 4K core is often used in off-load engines for video, 2D/3D graphics, and protocol stacks.

Figure 2: MIPS core family

Krishna points out that power efficiency is becoming a bigger issue and reinforces the fact that it is important for MIPS to follow industry standards such as Blu-Ray HD, HD Multimedia Interface (HDMI), USB, and the many wireless protocols like 802.11 and WiMAX.


Freescale Semiconductor ( has been in the SoC business for as long as anyone can remember. Starting with highly integrated parts like the HC08 and HC11, the company has carried the SoC philosophy into most of its microprocessor lines over the years. In fact, Freescaleís processors are so integrated that the company has started using the term motherboard-on-chip to describe the level of integration on its latest processors.

Imagine squeezing a PC motherboard with graphics and audio cards, PCI, Ethernet, SATA, and USB into a device smaller than an iPod Nano. Freescaleís MPC5121e mobileGT processor is a motherboard-on-a-chip device designed to provide the embedded processing performance, on-chip peripherals, and connectivity for Ultra-Mobile PC (UMPC) platforms. The triple-core architecture operates within a 2 W power envelope, virtually eliminating the need for bulky heat sinks and noisy fans required by traditional PC architectures. Integration to the level pushed by Freescale is introducing opportunities to place electronics in new devices.

Enter the giant

The market for SoC devices has caught the eye of virtually every microprocessor company. Intel ( has announced at least two efforts to create Intel Architecture-compatible SoC processors, which are expected to be available sometime this year.

At the Consumer Electronics Show this past January, Intel president and CEO Paul Otellini announced an SoC code-named Canmore, a powerful PC-class processor core with leading-edge, dedicated A/V processing that can play 1080p video with 7.1 surround sound, a 3D graphics unit for user interfaces and online games, and technologies to enable broadcast TV. Canmore is Intelís first Intel Architecture-based SoC product optimized for a new generation of set-top boxes, media players, and digital TVs. ìPackaging several important functions – such as computing, graphics, and audio/video processing – into a single chip will help devices do more while taking up less space and energy,î Otellini asserts.

At the 2007 Hot Chips Symposium sponsored by the IEEE Technical Committee on Microprocessors and Microcomputers, Intel laid out plans for a second SoC code-named Tolapai. This SoC is targeted at a variety of applications in the embedded, storage, and communications segments. Tolapai is also Intel Architecture code-based, allowing it to run existing mainstream Intel Architecture operating systems, drivers, and application software. It is designed to operate in the 13-20 W range, depending on the application.

Bruce Fishbein, director of Tolapai silicon engineering within Intelís Embedded and Communications Group, remarks that achieving the high levels of integration in an SoC like Tolapai poses several challenges, such as matching components that might not fit together because of different manufacturing processes or interconnect buses. Reduced visibility into the chipís internals because some buses are now within the chip makes it more difficult to test during manufacturing and debug. In addition, quality levels are expected to remain the same even though the device has additional internal circuits. Defects per million levels are hard to maintain from a manufacturing perspective.

Future products from the Intel Embedded and Communications Group will be based on lower-power devices like Silverthorne. Intelís first two SoC products promise to be the beginning of what is likely to be a very large portfolio of SoCs for a wide variety of market segments.

Software Defined Silicon

David May, CTO and founder of XMOS Semiconductor (, says, ìWe estimate that the worldís universities are producing 20-30 software designers for every hardware engineer. This shouldnít be a surprise since the responsibility of product differentiation increasingly lies in the software domain.î What this means is that software engineers will have a greater role in developing SoCs. To that end, XMOS, a new player in the SoC game, has announced a new class of programmable semiconductors tagged Software Defined Silicon (SDS). SDS differs from existing technologies by taking an entirely software approach to providing SoC configurability and programmability. Using small processor arrays instead of large gate arrays, SDS reduces silicon area and thus costs. SDS also has the benefit of software stacks that can run natively on it.

Central to the XMOS technology is a compact, event-driven, multithreaded processor called XCore. With up to 500 MIPS to share across up to eight threads, the XCore engine implements a range of complex hardware functions. Access to its computational and control capabilities is available through a familiar embedded software design flow. Using C-based behavioral languages, designers can quickly map whiteboard functional specifications into silicon.

A bright future

The consumer thirst for more intelligent devices is driving the future for SoC suppliers. Watch as fabless semiconductor manufacturers pump out innovative products powered by more efficient, easier-to-use SoCs.

Jerry Gipper (Editorial Director)
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