Is SiFive the RISC-V Standard Bearer, or a Design Mercenary?

August 27, 2020 Brandon Lewis

SiFive, a pioneer of commercializing the RISC-V instruction set and resulting IP, has announced a number of custom design wins. And a lot of them leverage Arm technology. In fact, SiFive's recent 20G1 release revealed that the company has developed SiFive Insight, debug and trace IP that features native compatibility with? You guessed it. Arm’s CoreSight IP that serves the same purpose.

So, is the RISC-V standard bearer ditching its heritage to become a design mercenary? Or is this a longer-term play to help get RISC-V technology into SoCs in any way possible so it can grow from there? Or are we over thinking it? Drew Barbier, Director of Product Marketing at SiFive, joins Brandon and Rich in this edition of the Embedded Insiders to explain.

About the Author

Brandon Lewis

Brandon Lewis, Editor-in-Chief of Embedded Computing Design, is responsible for guiding the property's content strategy, editorial direction, and engineering community engagement, which includes IoT Design, Automotive Embedded Systems, the Power Page, Industrial AI & Machine Learning, and other publications. As an experienced technical journalist, editor, and reporter with an aptitude for identifying key technologies, products, and market trends in the embedded technology sector, he enjoys covering topics that range from development kits and tools to cyber security and technology business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached by email at

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