Low-power, scalable DSP starts with customizable processor

May 19, 2015 OpenSystems Media

that boast low power usually get my attention. Sometimes it’s because I want to see if those boasts have any merit and sometimes it’s simply to see how far the technology can be pushed. In the case of Cadence’s Tensilica offering, it appears to be the latter. The company’s Fusion scalable digital signal processor (DSP), which is based on its Xtensa customizable processor, is suited for applications that can take advantage of a merged controller plus DSP computation. Obviously it comes at a low power level and with a small footprint, so applications like Internet of Things and wearables are potential targets.

The processor can be designed into systems-on-chip (SoCs) for wearable activity monitoring, indoor navigation, context-aware sensor fusion, secure local wireless connectivity, face trigger, voice trigger, and voice recognition. Optional instruction set architecture (ISA) extensions are included to accelerate multiple wireless protocols including Bluetooth Low Energy, Thread, and ZigBee using IEEE 802.15.4, SmartGrid 802.15.4g, Wi-Fi 802.11n and 802.11ah, 2G and LTE Category 0 release 12 and 13, and global navigation satellite systems (GNSS).

The DSP shares the Tensilica partner ecosystem for applications software, emulation and probes, silicon and services, and more. The configurable elements of the Fusion DSP include:

  • Tightly integrated floating point
  • One to four MACs supporting real and complex operations
  • AES-128 encryption
  • Flexible memory architecture
  • MAC and PHY algorithm acceleration
  • Audio/voice compatibility with the Tensilica HiFi architecture
Rich Nass, Embedded Computing Brand Director
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