There has certainly been a fair amount of buzz and discussion about the latest USB specification. Apple, for example, designed its newest MacBook with a single port – USB Type-C – for charging, data transfer, and video output. As the MacBook demonstrates, with USB Type-C we can ultimately see more electronic devices that operate on a single, functionally rich cable based on this standard.
USB Type-C eliminates the limitations of legacy Type-A and Type-B plugs, and brings with it an array of benefits for USB and other protocols. USB Power Delivery 2.0 and USB Alternate Modes, for example, enable USB Type-C to replace display, power, and other unique cables. Before long, USB Type-C could become the only standard connector available for electronic devices.
What does this mean from a design perspective? Designers will need to know how to meet emerging specifications, and address power delivery and verification. The challenges involved can be significant, yet manageable with the right design techniques.
One cable, multiple functions
Starting in 2015, USB Type-C has replaced all USB connectors. In the not-too-distant future, people will likely be using one primary type of cable to power and charge all electronic devices, as well as connect them to displays, sound systems, printers, and other peripherals. USB Type-C, USB Power Delivery 2.0, and USB Alternate Modes make this unified and ubiquitous functionality possible.
Marked by several key characteristics, USB Type-C:
- Supports reversible plugs with two-way insertion; in other words, the host and device connectors are the same
- Enables higher data rates, up to 10 Gbps for USB Type-C 3.1 Gen2
- Facilitates increased power, up to 100 W through support for the USB Power Delivery 2.0 specification
- Offers bi-directionality, so that devices can provide and consume power
- Supports scalable power charging, which means that power consumption may dynamically change depending on the application’s needs
- Can eventually replace all other connectors by using USB Alternate Modes
So far, the DisplayPort, MHL, and PCI Express specifications support USB Alternate Modes. These modes also cover digital audio through an audio accessory, smartphone feature extensions (uncompressed video interface and high-speed bi-directional data), and docking station applications (power charging). More specifications will surely follow. While this variation is great news for consumers, it does present some challenges from a design and verification perspective.
USB Type-C design requirements and challenges
USB Type-C comes with specific design requirements (Figure 1):
- Pull-up, pull-down resistors at configuration channel (CC) pins
- Capability to provide supply at VCONN
- Connection and marked cable detection, cold-socket, and VCONN control circuitry
- Switches to provide VCONN/Rp to CC pins (downstream-facing port (DFP))
- Control to turn off/on supply to VBUS
- Switch to connect SS_TX/SS_RX to TX1/RX1 or TX2/RX2
Each of the USB specifications – Type-C connector and cable, Power Delivery 2.0, and Alternate Modes – can be implemented individually; however, designers will derive much more value when using these complementary specifications in combination. So, designers could develop a single-chip solution for USB Type-C. They can also bring together multiple protocols; for example, a design can implement a common SERDES for both USB and DisplayPort specifications. And, Power Delivery 2.0 and Alternate Modes can be supported under the same controller/stack. With all of these new and distinct pieces and their complex dependencies, system verification can be a huge challenge. There’s a new level of integration hierarchy to consider, with alignment and integration of system interfaces, along with the need to deliver testbench and test scenarios for SoC integration.
There are also challenges from a PHY design perspective. Adopting the different protocols – including those to come – calls for a certain level of flexibility. Yet, the design techniques that a designer might apply to address the related challenges could further complicate verification. Complying with multiple protocols requires a PHY that supports a large electrical specification range, especially on the equalization side, like CTLE or DFE. This, in turn, calls for optimizing a single design to be area and performance efficient, such as via a single analog PHY.
Going to smaller processes to get a digital advantage poses severe limitations on the type of supply voltages that a design can use, as well as the type of devices that are available to meet electrical requirements. For instance, at the 28 nm and below nodes, only sub-1 V core devices and 1.8 V I/O devices are chosen by standard SoC or IP providers to be competitive. Hence, supporting 3 V and above in the existing die becomes a big bottleneck, unless multi vt and expensive additional mask sets are used. Minimizing costs and supporting such platforms requires many circuit techniques to circumvent the reliability issues related to electrical overstress.
Apart from these design challenges, verification is more complex. With improved test cases and better DFT schemes, coverage can be improved. Verification cycles are, however, reduced when looking at multiprotocol options, instead of considering a single protocol at a time.
Here, experience in advanced processes can help, especially if a designer has dealt with lower supply voltages, power dissipation in smaller devices, and parasitic RC in the interconnect. Technical considerations aside, there are the usual cost and time-to-market pressures associated with any design project.
How pre-verified IP can help
What’s needed to overcome these design and verification challenges? One really can’t go wrong with pre-verified IP, which can help simplify design effort and shorten the cycle. The following features and functions would be the most useful in IP for USB Type-C.
First and foremost, the design should integrate all the functionality required by the Type-C connector and cable specifications, i.e., the CC logic, and, optionally, multiplexers to enable all the good things a Type-C connector brings, like bi-directionality of the cable, connector flip, and simplified DFP/UFP role recognition.
To bring flexibility to a design, seek a single PHY that can support USB, DisplayPort, and any other existing as well as emerging protocols. The additional benefit of multi-lane support would allow maximum design flexibility while also easing inventory management complexities. To address multiple standards across functional, software, and electrical specifications, look for subsystem IP that is already integrated and compliant with relevant specifications to ensure compatibility.
Power management is another key consideration for USB Type-C IP. For such designs, the IP must be able to handle a wide range of power and be able to communicate with external power management IC up to 100 W and internal power management IC up to 15 W of 3 A over 5 V, as defined by the Medium and High Current Modes of the USB Type-C cable and connector specification.
Why an IP subsystem approach is a good idea
Why work with individual components if it’s not necessary? Choosing this route would mean spending time ensuring components are verified and will work well together. Instead, designers can further simplify their efforts by implementing a pre-verified, pre-integrated IP subsystem for USB Type-C.
The ideal subsystem should contain key components such as controllers for USB and other available specifications, a multi-protocol PHY, and a means to interface to an external power delivery stack (Figure 2). The subsystem approach saves time and effort, and results in better performance and lower power consumption than individual components can deliver. This also allows designers to configure the number of ports, slots, and other host and device functions.
The future of USB
USB Type-C is likely to be the dominant connector specification for electronic devices. With the cost and time sensitivities of these types of devices, implementing USB Type-C IP subsystems into designs can help get to market faster with products that better meet expected performance and power targets.