 | | With new tools for the ASSET® ScanWorks® platform for embedded instruments engineers can simply select instruments they need, set their parameters and insert them into a field programmable gate array (FPGA) to function as a circuit board tester. Once inserted, ScanWorks FCT operates the board-tester-in-a-chip from a drag-and-drop user interface to perform validation, test and debug. |
| For the second year in a row, Byte Paradigm has conducted an online survey to understand the role of using a ‘live’ prototype for testing and debugging embedded systems. This year, we paid special attention to the equipment that the electronic engineer finds in the lab or on the desk to efficiently test and debug embedded systems. Results show that using a prototype is widely seen as a way to speed up debugging and that digital pattern generators are gaining success for the generation of digital input stimuli. |
| Keil ULINK®pro Debug and Trace Unit together with MDK-ARMô, provides extended on-the-fly debug capabilities for all Cortex-M devices |
| XJTAG's new chain debugger abstracts engineers from the complexity of the JTAG standard and significantly improves set-up time and fault diagnostics on BGA-populated PCBs |
| The new ScanWorks for Embedded Boundary Scan from ASSET InterTech can be easily embedded in systems apply system-level JTAG (SJTAG) test, diagnostic and programming are applied |
| Lauterbach, the leading manufacturer of hardware assisted microprocessor development tools, has launched a new high performance debug probe for NEC Electronics 16-bit microcontroller family 78K0R/Kx3. |
| OneSpin 360 MV’s New RootCauseAnalyzer(tm) Speeds Assertion and Design Debug by up to 10x |
| The SPRINT consortium announced today the publication of the Multi-Core Debug (MCD) API v1.0. The release is a result of the consortium’s debug and analysis working group targeting the development of new debug and analysis interfaces. Its members contributed their expertise and knowledge in the field of application software debugging for System-on-Chip (SoC) designs. The API addresses debugging of multi-core platforms as both real hardware and software simulation. Adopting the interface on both tool- and target-side, debug and analysis solutions can be easily attached to the latest available SoC prototype, no matter if it is a virtual prototype (software simulation) or silicon. It has the potential to reduce expenses for tools and to increase the efficiency of software engineers with respect to application debugging and analysis throughout the entire process of the SoC design. Today, SoC design flows span several levels of abstraction, ranging from high level simulations to the final integrated hardware. Throughout this design, various off-the-shelf components of intellectual property (IP) are assembled in order to achieve high quality designs in short time. The Open SoC Design Platform for Reuse and Integration of IPs (SPRINT) Project has taken the challenge to develop a standards-based platform supporting the creation of interoperable and reusable IP as well as their efficient integration into high class SoCs. The SPRINT consortium consists of numerous companies and research facilities from the IP business, including both providers and users. |
| Also On Display at EVE’s Stand Will be ZeBu-Personal, zFAST Synthesis, ZEMI-3 |
| Adds Support for SystemVerilog Assertions, Flexible Probes, Waveform Generation With Combinational Signals |
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