While much has been made of the Big Data and cloud storage aspects of the Internet of Things (IoT), much less attention has been paid to the growing memory requirements of devices that exist at the edge. Here, as connectivity, security, and demands for localized intelligence increase, so too do the expectations for low cost, small footprint, and minimal power from embedded storage solutions.
A 2016 Top Embedded Innovator, Jeff Bader, Vice President, Embedded Business Unit at Micron Technology, has overseen the growth of an automotive and industrial memory portfolio that now ships more than 1 million parts per day. In this interview with Embedded Computing Design, Bader offers his take on the current memory bottlenecks for IoT edge devices, advances in memory technology and packaging, and a vision for what integrated storage solutions could look like in 5 to 10 years.
Why is storage at the edge of IoT critical, and what memory bottlenecks currently exist there?
BADER: Device storage in the IoT is a rapidly growing area for both memory and digital storage that is growing from the continued distribution of compute and communications capabilities to the edges of an ever-expanding network of connections. As the capability of those edge devices increases, the memory and storage needs within them are increasing as well. At the same time, the challenges of connectivity – bandwidth, latency, and persistence – are driving the need to increase both storage and data intelligence even further in those edge devices.
As the costs of compute and storage continue to decline, it enables the distribution of the data analytics toward the edge, which can provide faster response times, better decision support, or simpler overall system design. Ultimately, we want real-time decisions from our devices, not just data. By leveraging local storage and the intelligence to analyze, devices can provide richer information for upstream analytics engines. In terms of the memory bottlenecks or key memory criteria today, systems are really driving a balance of performance, reliability, and cost in addition to things like power, form factor and longevity, depending on the specific device.
In order to truly see the scale of IoT that has been forecast, the interoperability standards and related security concerns of edge devices need to improve. Recent studies have suggested that a significant percentage of all IoT devices today are lacking even very basic security features, and security at the system level can be significantly improved by secure storage features within memory devices.
What is being done to reduce the cost of storage for embedded/IoT devices? What wafer or process technologies are emerging to enable this?
BADER: Faster adoption of leading edge technology is occurring in embedded applications that traditionally used technology only after it had been adopted and in stable production by mainstream applications. We see this, for example, with the strong adoption of LPDDR4 technology in automotive applications today.
While we do see the adoption of leading edge lithography to enable cost reductions within embedded/IoT devices, this is balanced by a need within these applications for extended lifecycles and higher durability. As a result, memory solutions must be developed that support both cost reductions and improved durability, such as the family of industrial-grade SSDs Micron recently introduced. Another key trend driving system cost reductions is the increasing use of multi-chip packages (MCPs) and system-in-package (SiP) solutions. Integrating DRAM with non-volatile memory in an MCP or combined with an SoC in an SiP solution can deliver significant system cost savings in addition to performance and power benefits.
5 to 10 years from now, what is going to be the storage architecture of choice for Industrial IoT and embedded systems?
BADER: The crystal ball gets a little foggy 10 years from now, but it’s probably safe to say some of the same key trends we see today will continue in embedded and IoT. For higher function IoT devices, the proliferation of mobile architectures into embedded systems will continue, taking advantage of the scale, performance, and power of those systems. This means advanced DRAM, eMMC, and universal flash storage (UFS) will combine in MCP and package on package (PoP) configurations to deliver the best performance and form factor possible. For lower function devices, we’ll continue to see NOR as the primary boot solution with a growing use of low-density NAND and eMMC. In the longer term we could also see the adoption of emerging memory solutions like Micron’s transistor-less 3D Xpoint technology, which could serve as a simple non-volatile RAM solution replacing (or augmenting) both DRAM and NAND in those devices.
Micron Technology, Inc.