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EVE (Emulation & Verification Engineering)
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1 through 40 of 217
products found
Products
Vendors
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S765AT
from
Schlumberger Semiconductor Solutions
End-of-line functional verification system for automotive electronic modules and sub-assemblies...
eve
emulation
verification
engineering
CPCI-DIO
from
Measurement Computing Corporation
A family of low cost, 24-bit/48-bit/96-bit, logic level digital I/O boards Provides a discrete logic emul...
Provides a discrete logic emulation of the 82C55 mode 0, but offers significantly higher output drive capability (64mA sink, 15 mA source)
Mode 0 emulation is fully compatible with the 82C55, and code written for 82C55 mode-based boards will function perfectly on the CPCI-DIO
All boards come complete with Measurement Computing's InstaCal software package, a complete installation, calibration, and test program
eve
emulation
verification
engineering
iSolve and Veloce combo
from
Mentor Graphics Corporation
Mentor Graphics?PCI Express verification combination includes the Veloce family of ICE accelerator devices...
Together, they can verify PCI Express operation, signaling, and I/O connectivity
Compliant to both PCIe 1.1 and 2.0
eve
emulation
verification
engineering
DAQ Commander
from
Radical Systems Engineering
Windows95 PC-based, turnkey data acquisition package with graphical user interface Data labels, units, sc...
eve
emulation
verification
engineering
DAQ in a Box
from
Radical Systems Engineering
Windows95 PC-based, turnkey data acquisition package requires no programming Data labels, units, scale, a...
eve
emulation
verification
engineering
MPLAB REAL ICE
from
Microchip Technology, Inc.
An emulation System that Provides Full-Speed, Low-Cost Emulation for Microchip? PIC microcontrollers and d...
Standard and advanced debugging facilities, such as complex break points, application code trace and data logging, code execution stopwatch, and real-time variable monitoring
Fully integrated into the MPLAB Integrated D
EVE
lopment Environment (IDE) for writing code, building projects, testing,
Verification
, and programming
L
EVE
raging the power of the MPLAB IDE, the emulation system integrates hardware and software application design tools to aid d
EVE
lopment and enable rapid application deployment within a consistent, unified framework
High-speed data interfaces rapidly upload large trace records and accommodate quick monitoring and instant adjustment of application parameters
eve
emulation
verification
engineering
STX Series SAS/SATA Analyzers
from
Catalyst Enterprises, Inc.
Catalyst? STX Series, the SAS Master and SATA Master, are highly integrated, compact and advanced test & a...
Two basic platforms are provided, STX-230 and STX-430. The STX-430IB version provides an alternative front-panel 4X port connection (SFF-8470)
The STX-230 is a two-port analyzer unit with optional host and device emulation capabilities and the STX-430 is a four-port analyzer unit with optional host and device emulation capabilities
Both platforms fully support either SATA or SATA & SAS, at speeds up to 3Gb/s. Control interface connections include 10/100 Ethernet and high-speed USB connections, located at the rear of the units
eve
emulation
verification
engineering
Draco-VA
from
Tarek Verification Systems
Reusable building blocks to implement a unified verification environment at all abstracted design levels, e.g., ...
Object-oriented data and data structure control and management automates brand-new test creation without programming effort
Unlimited extension and open interface for third-party IP and VIP control. Supports SystemVerilog and Open
Verification
methodology from Mentor and Cadence
Automate debugging process with table-driven assertion generation and transaction database management on any interface
First silicon success is ensured with full coverage and standard compliance
eve
emulation
verification
engineering
Consulting and Engineering Services
from
Mindready Solutions, Inc.
Porting services Hardware and Software Design and Development Services Testing Services Con...
Hardware and Software Design and D
EVE
lopment Services
Testing Services
Consulting and
Engineering
Services for Audio/Video Solutions
Consulting and
Engineering
Services for IP
eve
emulation
verification
engineering
IO140
from
Interface Technology, Inc
Single-slot, C-size, VXI differential TTL digital I/O module Provides 32 differential TTL I/O channels pl...
Four IDC connectors are provided on the front panel
I/O pins may be programmed by sending high-l
EVE
l commands or with direct, high-speed VME read/writes
Memory emulation and block input or output modes allow autonomous operation from the local microprocessor
eve
emulation
verification
engineering
IO54
from
Interface Technology, Inc
Single-slot, C-size, VXI differential TTL digital I/O module Provides 32 differential TTL I/O channels ...
Tristate control of outputs allow for emulation of bidirectional data and control buses
Two IDC connectors are provided on the front panel
I/O pins may be programmed by sending high-l
EVE
l commands or with direct, high-speed VME read/writes
Memory emulation and block input or output modes allow autonomous operation from the local microprocessor
eve
emulation
verification
engineering
DSL 5000
from
Merge Technologies Group
Central office emulation system provides multiprotocol emulation Designed to give broadband and ISDN equi...
Designed to give broadband and ISDN equipment vendors a platform for d
EVE
loping, testing, and demonstrating digital telephony products
Includes power supply, CompactPCI bus, and Pentium computer in cabinet designed to accept a family of emulators
eve
emulation
verification
engineering
VMEHSD
from
Applied Data Sciences
A VMEbus-controlled Encore HSDII emulation board Provides a high-speed data link between the VMEbus and a...
Provides a high-speed data link between the VMEbus and an Encore computer HSDII interface board or compatible device
Emulation of the following Encore HSD modes: HSD normal device mode, IBL mode, external mode, device emulation mode (optional)
Supports VMEbus master, slave, and block transfer (32-bit) modes
Onboard FIFO
Compatible with Encore HSD or IBL cables
Selectable 68020 processor clock at 16 or 32 MHz
Software support includes source code drivers for Unix and Sun Solaris
eve
emulation
verification
engineering
360 MV Check
from
OneSpin Solutions
Formal verification tool for verifying implementation intent Designers detect implementation bugs weeks o...
Designers detect implementation bugs weeks or months before testbenches are available
eve
emulation
verification
engineering
360 MV Verify
from
OneSpin Solutions
Formal assertion-based verification tool for verifying functional requirements and design operations Find...
Finds deep, complex errors more efficiently than simulation or other tools
Deploys automated proof-based debugger -- automatic error localization for complex SystemVerilog assertions
Guides users in systemaic verification of design operations, i.e. read/write operations of a cache controller
Most advanced diagnosis environment for complex SVAs
eve
emulation
verification
engineering
360 MV Inspect
from
OneSpin Solutions
Formal verification tool for autochecks that lets designers detect RTL errors as soon as first code is available...
Exhaustively verifies thousands of checks in minutes that are automatically extracted from the RTL code
Requires no knowledge of assertion languages
eve
emulation
verification
engineering
360 MV Certify(TM)
from
OneSpin Solutions
OneSpin's flagship formal assertion-based verification tool for gap-free verification It delivers verific...
It delivers verification quality that cannot be ensured by any other verification approach
Implements OneSpin's GapFre
EVE
rification(TM) closed-loop process
Integrates verification planning, verification execution and automatic gap detection
Achieves highest possible
Verification
quality
Guides d
EVE
lopment of a gap-free set of SystemVerilog assertions
Builds specification-compliant reference model of the design's full functionality
eve
emulation
verification
engineering
360 MV Assure
from
OneSpin Solutions
Formal assertion-based verification tool with uniqautomatic gap detection Enhances systematic verificatio...
Enhances systematic
Verification
of design operations with automatic ID of unverified input scenarios
Debug and diagnosis environment guides users to d
EVE
lop SystemVerilog assertions to close gaps
Assures thorough specification/implementation co-verification
eve
emulation
verification
engineering
VarioTAP
from
GOEPEL electronic
VarioTAP is a revolutionary technology for pattern streaming on TAP (Test Access Port) signals compliant with IE...
High-speed On-Chip Flash Programming
eve
emulation
verification
engineering
Boundary Scan Probe
from
GOEPEL electronic
A universal debug tool for boundary scan Special debug hardware for IEEE-1149.1/JTAG circuits Vari...
Special debug hardware for IEEE-1149.1/JTAG circuits
Verification of boundary scan structures on chip level and the related BSDL files can be automated by a special emulation mode
Fully compatible with all boundary scan controllers from GOEPEL
eve
emulation
verification
engineering
TRACE32-FIRE
from
Lauterbach, Inc.
Developed specifically for applications using microcontrollers operating at extremely high speeds Full sp...
Full speed emulation
Due to the open design TRACE32 customers can rely on rapid availability of new probes
Supports bond-out or emulation devices for 16-bit and 32-bit Flash controllers and provides support for non-intrusive debugging, replacing internal Flash by emulation memory at the maximum clock frequency across the full voltage range
High speed download is achi
EVE
d using the Ethernet interface
All debug file formatsfully supported
eve
emulation
verification
engineering
RocketDrive
from
GateRocket, Inc.
RocketDrive is a Device Native FPGA verification system that provides a dramatic increase in FPGA verification a...
Replaces RTL and gate-level simulation models with actual FPGA hardware for Device Native simulation
Accelerates verification throughput by up to 10x or more over RTL simulation
Identifies problems with IP blocks, pin-outs and tool chain anomalies that are missed in normal simulation
eve
emulation
verification
engineering
SPI510 JTAG
from
Spectrum Digital
A 4.38 x 3.25 x 0.91 inch adjustable voltage pod for JTAG emulators I/O voltage levels can be adjusted fo...
I/O voltage l
EVE
ls can be adjusted for low voltage devices
Supports TI's DSPs and Microcontrollers with JTAG interface
Four status LEDs for selftest and voltage levels
Incorporates EMU0/EMU1 hold/reset features for 'C2700 DSPs
Compatible with Windows based Code Composer by GO DSP
eve
emulation
verification
engineering
M2C-Acceleratorª
from
AccelChip Inc.
M2C-Accelerator Speeds the Creation and Verification of C Models from MATLAB by up to 1000x Automates the...
Automates the generation of fixed-point C++
Verification
models from a golden floating-point MATLAB source
Bit-true model
eve
emulation
verification
engineering
M2C-Accelerator
from
AccelChip Inc.
Speeds the Creation and Verification of C models from MATLAB by up to 1000x Automates the generation of f...
Automates the generation of fixed-point C++ verification models from a golden floating-point MATLAB source
Bit-true model
eve
emulation
verification
engineering
ZeBu-UF4
from
EVE-USA, Inc.
ZeBu-UF4 gives you the fastest verification possible, with speeds up to 20MHz for designs up to 6M ASIC gates. Z...
Up to 20MHz for designs up to 6M gates
Fully automatic compilation and re-compilation including:
Memory generation & pre-defined memory models
eve
emulation
verification
engineering
Hardware and Software Engineering Services
from
VI Technology
VI Technology offers hardware and software engineering services to a wide range of technology industries ...
Services are available in the areas of: Systems engineering and design, Application software design, Driver software design, Rack and stack test fixtures, Basic PCB design, layout, & fabrication
VI has experience in engineering design and programming
As a National Instruments Select Integrator and a Microsoft Certified Partner, VI Technology has the expertise to d
EVE
lop systems for your applications
eve
emulation
verification
engineering
FPGA-DSP Tools
from
XILINX, Inc.
Development tool suite Developers can model and design a system using MATLAB, Simulink, and blocksets fro...
Developers can model and design a system using MATLAB, Simulink, and blocksets from The MathWorks
System
Verification
using hardware-in-the-loop or emulation
More than 60 XtremeDSP algorithms delivered as IP cores
Multiple XtremeDSP d
EVE
lopment platforms for video, digital communications, or military applications such as SDR and JTRS
eve
emulation
verification
engineering
Ascent
from
Real Intent
All-in-one automatic early functional verification software includes lint and sequential formal analysis ...
includes lint and sequential formal analysis capabilities to find bugs in the design without any testbench
eve
emulation
verification
engineering
Meridian CDC
from
Real Intent
Clock-domain crossing verification software for ASIC and FPGA designs Automatic clock intent verification...
Automatic clock intent verification
Exhaustive formal analysis and dynamic simulation capabilities to ensure reliable CDC crossings
eve
emulation
verification
engineering
Aldec DO-254 CTS
from
ALDEC, Inc
The DO-254 CTS consists of a mixed language HDL Simulation tool suite and In-Hardware Simulation system that sup...
The DO-254 CTS solution from Aldec provides support for L
EVE
ls A through D of the ÒDesign Assurance Guidance for Airborne Electronic HardwareÓ (DO-254/ED-80) Chapter 6.2 ÒVerification ProcessÓ and Chapter 11.4 ÒTool Assessment and Qualification ProcessÓ
The
Verification
process runs at speed, driven by the vectors captured during HDL simulation
Same number of tests can be run in the target device as in the HDL simulator; 100% functional coverage can be easily assured and automatically implemented
Automatic results comparison between the HDL simulation and In-Hardware testing
eve
emulation
verification
engineering
HES
from
ALDEC, Inc
HES (Hardware Emulation System) may be used for emulation, acceleration and prototyping Emulation up to 1...
Emulation
up to 10 MHz
Acceleration up to 500 KHz
Design
Verification
Manger [DVM
Daughterboard connection (connection to external boards and/or devices)
Super macro support (groups modules together for increased performance)
Manual design partitioning (manual mapping based on resource information)
Automatic design partitioning Ð with signal multiplexing using LVDS
Testbench optimizer Ð VHDL to C++ conversion
Clock conversion and analysis (convert multiple clock domains to one)
Memory model mapping (maps user memory to on-board memory)
Prototyping API and function library (interface with C++ domain)
Interface to Xilinx ChipScope Pro (device debugging)
Emulation mode (design clock up to 2MHz)
Emulation
results stored in waveform (ASDB and VCD)
Hardware memory mapping (maps user memory to on-board memory)
Emulation debugging
SCE-MI 2.0 interface support
ARM processor support (ARM 720T, 920T, 926, or 946)
Multi-chip design access (ability to use multi-chip FPGA boards)
Interface to hardware boards Ð includes drivers (Aldec, HAPS, or DINI)
HDL simulator interface (Aldec, Cadence, MentorGraphics or Synopsys)
Additional HDL simulator interface (Aldec, Cadence, Mentor or Synopsys)
Additional ARM processor support (ARM 720T, 920T, 926 or 946)
Additional interface to 3rd party hardware boards Ð includes drivers and daughter card to support additional boards from (HAPS or DINI)
Single-chip FPGA boards (FPGA acceleration and prototyping): Virtex-II FPGA Ð up to 1 million Xilinx FPGA gates; Virtex-II FPGA Ð up to 3 million Xilinx FPGA gates and 1GB SDRAM (single V2-3000 chip); Virtex-II FPGA Ð up to 6 million Xilinx FPGA gates and 128 Mb RAM (single V2-6000 chip)
Stratix I FPGA Ð up to 30,000 Altera Logic Elements and 1 GB RAM (single S25EX chip); Stratix I FPGA Ð up to 90,000 Altera Logic Elements and 1 GB RAM (single S80EX chip)
Multi-chip FPGA boards (ASIC acceleration/emulation and prototyping): Virtex-II FPGA Ð up to 1 million ASIC gates and 256 Mb RAM (dual V2-6000 chips); Virtex-4 FPGA Ð up to 2 million ASIC gates and 1GB DDR2 (dual, V4LX200 chips); Virtex-4 HAPS-34 - 3-6 million ASIC gates (4 Ð Xilinx Virtex-4 chips, either LX100, LX160 or LX200) -Synopsys; Virtex-5 DN Ð up to 4 million ASIC gates and DDR2 (dual V5LX330 chips)-Dini Group; Virtex-5 HAPS-54 - 8 million ASIC gates (4 Ð Xilinx Virtex-5 LX330 chips)- Synopsys; Virtex-5 DN Ð up to 10 million ASIC gates and DDR2 (6 Ð V5LX330 chips)-Dini Group; Virtex-5 DN Ð up to 32 million ASIC gates and DDR2 (16 Ð V5LX330 chips)-Dini Group
eve
emulation
verification
engineering
Riviera-IPT
from
ALDEC, Inc
A high-speed co-verification and debug environment for complex embedded software/hardware co-development utilizi...
ÊBased on Aldec+IBk-s VHDL and Verilog mixed-language simulation technology, Design
Verification
Manager, and a hardware accelerator with capacity up to 12 million gates
Riviera-IPT+IBk-s hardware accelerator allows designs to run at MHz speeds
eve
emulation
verification
engineering
Virtual Serial Port
from
FabulaTech
Program creates pairs of virtual serial ports connected virtually to each other Full hardware serial port...
Full hardware serial ports emulation
Virtual serial ports look and work like real hardware ports
No system reboot is required
eve
emulation
verification
engineering
Venus-X
from
AMO GmbH
A FPGA-based emulation platform Enables accelerated ASIC design verification as well as hardware-assisted...
Enables accelerated ASIC design
Verification
as well as hardware-assisted software debugging and implementation of massive parallel algorithms at an early stage of the product d
EVE
lopment process
ÊConsists of two core units, each carrying up to three Xilinx Virtex-II XC2V-6000 (optional XC2V-8000) FPGAs with more than 1,000 I/O signals
All signal paths may be switched to either point-to-point, bus, or star topology, whereby more than 10,000 paths provide sufficient resources within a six-FPGA environment
ÊFlexible, programmable clock distribution
ÊOver 1,000 signals and multiple clock inputs available on the front panel
Graphical front-end, which allows step-by-step configuration of the environment for optimum setup
eve
emulation
verification
engineering
WCDMA ACE
from
Aeroflex
3G protocol analysis test system Powerful network emulator for integration, regression, and pre-conforman...
Supports early d
EVE
lopment of protocol test scenarios
Compact, one-box solution with integrated PC
Built-in fading simulator option
Powerful, state of the art test d
EVE
lopment environment allows testing on partial or complete terminal designs
Proven GUI features with a track record of boosting engineering productivity
eve
emulation
verification
engineering
GX1034
from
Geotest
Offers PXI system designers the capability to develop a system recertification strategy that employs only intern...
By incorporating the GX1034 as part of a system configuration, it is possible to d
EVE
lop a system accuracy
Verification
strategy that can recertify a systemÕs source and measure baseband instrumentation Ð resulting in simplified support/ maintenance logistics and improved system availability
GX1034Õs standards exhibit excellent long term stability with absolute accuracy achi
EVE
d by employing an onboard EEROM, which contains NIST traceable calibration values for source and resistor standards
Includes source and measure resources which can be used to support system self-test functions including continuity verification and verification of instrument functionality
Precision standards module for PXI systems
ÊNIST traceable standards
ÊCompact, single-slot 3U PXI format
ÊSuitable for in-system recertification of PXI instruments
eve
emulation
verification
engineering
GX6062
from
Geotest
A high-density RF multiplexer in 6U PXI form factor 12 groups of 1:4 multiplexers that can be software co...
Suited for Automated Test Equipment (ATE), parametric measurements, engineering
Verification
, high-density switching systems, and RF communications
eve
emulation
verification
engineering
PROC9M SoC Prototyp
from
Gidel
An SoC prototyping system Debugs designs up to 9 million gates Operates at speeds up to 250 MHz ...
Debugs designs up to 9 million gates
Fastest verification speed Ð designed to operate at 300 MHz
Maximum flexibility of interconnection and system IOs for high-speed operation
eve
emulation
verification
engineering
PCI-200EJ
from
Asset
Boundary-scan controller capable of applying both JTAG and functional microprocessor emulation tests on the same...
Capable of applying both JTAG and functional microprocessor emulation tests on the same circuit board
PCI-200EJ controller increases test coverage by supporting ScanWorksÕ JTAG operations and the functional testing capabilities of ITTÕs µMaster emulation testers
Supports all of the ScanWorks boundary-scan operations
ScanWorksÕ advanced usability and automation features have made it the boundary-scan system of choice by practically all major communication and defense/avionics suppliers, including Cisco, Ericsson, Motorola, Lucent, Alcatel, Tellabs, Huawei, Raytheon, Rockwell, Lockheed Martin, BAE, ITT, Northrop Grumman, Smiths, and others
eve
emulation
verification
engineering
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