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 Dual Base Camera-Link Frame Grabber with Dual Altera Cyclone III FPGA Video Processing Resources - Camera link frame grabber
- Two Base configurations via two mini CL connectors
- High -peed DSP processing in two Xilinx Virtex-4 FPGA
- XC4VSX55, XC4VLX40, XC4VLX60, XC4VLX80, XC4VLX100 or XC4VLX160
- XC4VFX20 or XC4VFX60 with embedded PowerPC RISC processor
- FPGA configuration on-board storage
- Off-the-shelf IP cores for real time compression (JPEG2000, edge detection)
- FPGA firmware design services available upon request
- 2 x 32M x 16 DDR2 SDRAM (128 MB)
- 4 x 2M x 32 QDR2 SRAM devices (32 MB)
- 128 Mbit flash device
- PCI-X 64-bit 133 MHz, 3.3 V
- PCI-X/PCI 64/32-bit 66 MHz, 3.3 V
- PCI 64/32-bit 33 MHz, 3.3 V
- PMC Pn4 64 I/O connected to FPGA A
- Measured sustained bandwidth: 64-bit 133 MHz = 760 MBps; 64-bit 66 MHz = 450 MBps; 32-bit 33 MHz = 120 MBps
- FPGA reference design
- API, documentation and sample source code
- Software utility to program on-board Flash with FPGA configuration data
- Device driver for Windows 2000/XP, Linux and VxWorks
- Test /demonstration application
- Custom FPGA firmware /application /driver development available upon request
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Product Entered: 2009-10-22,
Last Modified: 2009-11-04 |
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