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Pentek, Inc. RSC#: 43150
4207 w/VxWorks support
A feature-packed VXS I/O Processor Board, now featuring VxWorks support
  • Dual-core Freescale 1.5 GHz 8641D PowerPC
  • Fabric-transparent gigabit serial crossbar switch
  • Dual optical gigabit serial transceivers
  • Dual PMC/XMC mezzanine board sites
  • Supports serial RapidIO, Fibre Channel, Xilinx Aurora, and more
  • Xilinx Virtex FPGA for custom DSP and serial protocols
  • New VxWorks Board Support Package (BSP) provides software developers with a complete library of hardware-initialization, control, and application functions fully compatible with Wind River’s Workbench development environment
  • Designed for connectivity
  • The fabric-transparent, zero-latency crossbar switch connects the PowerPC, XMC module sites, the VXS connector, front-panel optical transceivers, Fibre Channel controller, and FPGA ports together using high-speed gigabit serial data paths
  • Two front-panel optical ports can be connected to the Fibre Channel controller to support an 800 MBps VxWorks file system on an attached disk array
  • Well suited for wideband, data acquisition and recording, real-time digital signal processing, and software radio applications
  • Equipped with either a single-core MPC8641 or a dual-core MPC8641D executing at a maximum frequency of 1.5 GHz
  • These AltiVec Freescale PowerPC processors perform 128-bit parallel processing and deliver DSP floating-point processing rates of up to 12,000 GFLOPS
  • Processor includes built-in gigabit serial fabric support for 4x Serial RapidIO
  • Includes an optional onboard Xilinx Virtex-4 FX Series FPGA, the XC4VFX60 or XC4VFX100
  • Two 4x RocketIO ports provide high-speed serial paths between the FPGA and the crossbar switch for connection to other parts of the board, including the processor, VXS interface, and XMC sites
  • Built-in Xilinx Aurora protocol engine, DMA controller, and PCI-X interface simplify data transfers to and from the FPGA and two 256 MB banks of DDR2 SDRAM attached to the FPGA

Product Entered: 2009-10-02, Last Modified: 2009-11-04