Impressions from the Recent RISC-V Workshop in Barcelona

May 18, 2018 Rupert Baines, CEO, UltraSoC

I was at the RISC-V Workshop in Barcelona a last week. I came away with plenty of food for thought. There’s serious momentum gathering behind the RISC-V concept, and a growing commercial ecosystem surrounding it. But it’s very clear that we’ve still a long way to go to make it truly pervasive; when I say pervasive, I’m comparing it with technologies like Bluetooth, USB, and Ethernet. And with certain global regions lagging behind, there remains a question of whether it’s going to be a global success.

First, the good news. In terms of participants, last week’s Workshop was the RISC-V Foundation’s most successful event outside of Silicon Valley. Attendance stood at 320, with representation from big-name tech companies, start-ups, academics, and even hobbyists. There was a lot to see in terms of companies showing off how and where progress is being made by the RISC-V community.

Take a look at the proceedings. People travelled from far and wide to get involved with RISC-V and to be part of the community. The growing breadth of the attendees and presenters is even more telling, encompassing chip and system design, computing, communications, and automotive manufacturers and some big names in the technology sector, including Facebook and Google (which is using RISC-V for its Pixel2 phone). Equally important to those big names is the participation of Western Digital; it plans to embed RISC-V cores in all of its products, more closely coupling storage and processors for handling big data and fast processing applications.

Between the 6th Workshop in Shanghai in May 2017 and the 8th Workshop in Barcelona, the industry has moved from discussing the fundamentals of the ecosystem, to making solid choices about implementation and security. We’re now starting to see and hear about products that are well down the road in development. Several groups brought RISC-V based systems to Barcelona, running various flavors of Linux—the RISC-V desktop PC is now a reality, including multi-core systems.

As I mentioned, security was a big theme, with the words “meltdown” and “spectre” being thrown around liberally. An open, auditable architecture, without legacy issues, will be very appealing to security-conscious users. The same users who might want to make use of UltraSoC’s bare-metal security offerings.

Another striking plus point was the scale and diversity of development already taking place, from Esperanto with its chips containing thousands of cores, to IBM’s plans for a tiny 0.3- by 0.25-mm RISC-V SoC. And 128-bit addressing is an exciting prospect, with a working group already taking shape.

At UltraSoC, we believe we’re the only company currently offering a RISC-V trace solution, so our Workshop demos of run-control and instruction trace with SiFive and Andes cores attracted queues. We’re also making commercial progress. Six months ago, we were signing design partners; today we have customers with ground-breaking RISC-V designs. We just announced a partnership with Andes and its high-end AndesCore RISC-V processor IP; and Esperanto’s AI Supercomputer on a chip with thousands of RISC-V cores.

With all this positive news, why am I still uneasy? With any new technology, the question of “Are we there yet?” will always come up. Many technologies don’t fulfill their potential, so the question is valid. Where is RISC-V then, in terms of development and adoption? Is it living up to the hype? There’s a large gap between a great idea and commercial success.

I don’t think RISC-V has quite crossed the chasm yet. There’s still a feel of early adopters and evangelists, and people wanting to see it move to the next stage. They want to see commitment and designs from more companies, which is why people were clamoring to see working demos. We’re getting there, and things are moving quickly. But we do need the industry to work harder to make it all happen. We’re now seeing the early adopters.

While North American and Asian companies turned out in force, the geographical area that was worst represented was Europe—even more surprising given the venue. It worries me that, with a lack of European firms in the vanguard, RISC-V might prove to be yet another technology where Europe has missed out by getting involved too late.

Rupert Baines is the CEO of UltraSoC.

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