Boston, March 23, 2010 – The SOI Industry Consortium today announced the launch of its “Ready for SOI Technology” program, a global initiative to broaden access to energy-efficient silicon-on-insulator (SOI) technology for the electronics industry. With this program an initial offering of SOI intellectual property from IBM, ARM, Cadence Design Systems and other companies is now available, with an invitation extended to other developers to add to the growing SOI IP ecosystem.

SOI process technology can provide up to 30 percent improvement in chip performance and 40 percent power reduction compared to bulk silicon technology. SOI is used today in market-leading products found in data centers, offices, vehicles, homes and storage and networking, as well as for graphics-intensive game consoles. The Ready for SOI program enables access to all necessary design building blocks and company’s that are providing them to accelerate the design an engineer’s design cycle and harness SOI technology benefits for new applications, including mobile and consumer products.

A key enabler of this effort is the new SOI Portal is hosted on the popular ChipEstimate.com site. The SOI Portal provides chip designers access to design building blocks and to the companies supporting fabless chip development on SOI foundry processes.

To help IP and chip designers transition to SOI, the Ready for SOI program is sponsoring SOI Jump Start Training. This training event will be hosted by Cadence on April 28, 2010, at the Cadence Engineering Center Auditorium, in San Jose, Calif. Jump Start Training will be available as both a live and recorded webcast.

Designers can take advantage of IBM’s SOI foundry offering with embedded DRAM. IBM’s SOI technology with eDRAM is a key enabler for multi-core processors and other integrated circuits and can result in improved systems performance and energy savings for a range of applications including networking, printer, storage, consumer and mobile products.

Another SOI Consortium member, Synopsys, is adding SOI IP to the SOI Portal. Additonal key IP providers are in the process of porting their IP to this effort, including mapping their existing bulk IP to SOI.

The SOI Industry Consortium invites all chip designers to evaluate the advantages of SOI for their next design by visiting the SOI Portal at www.ChipEstimate.com/SOI. Designers worldwide are invited to register and attend the SOI Jump Start training on April 28, 2010 register here >>>, with the option of attending a live event in Silicon Valley hosted by Cadence, or online in a simulcast or recorded webinar.

Digital, analog[] and mixed-signal IP suppliers are invited to participate in listing their offerings on the SOI Portal. Please contact the SOI consortium for details.

Quotes

Adam Traidman, General Manager of Chip Planning Solutions at Cadence

“ChipEstimate.com has become a critical resource to over 26,000 registered SoC designers by providing central access to over 200 of the world’s largest IP suppliers and foundries. Our new SOI micro-site will serve as an invaluable resource to designers wishing to explore the benefits of SOI technology for their chip design projects.”

Horacio Mendez, Executive Director of the SOI Industry Consortium

“We are removing a barrier to industry adoption by giving all chip designers access to the benefits of SOI, not just those working for integrated device manufacturers and high-end ASIC developers. Through the enablement provided by ARM’s SOI libraries and EDA[] tool suppliers, a vast range of synthesizable IP is now easily portable to SOI technology and physical IP can be readily ported or designed using industry standard tools.”

Michael Cardigan, General Manager of IBM Microelectronics Division

“IBM was the first company to ship SOI products and we are now in our seventh generation of this leading technology. Through this collaboration with ARM, Cadence and other suppliers, we are providing an open design system and a proven supply chain to bring the significant performance and power-saving advantages of SOI technology to clients developing mobile and other system-on-chip applications.”