Industry dynamics are driving seemingly insatiable demand for higher bandwidth and higher system-level performance while facing more stringent mandatory requirements to reduce power consumption. At the same time, competitive pressures are forcing customers to increase productivity without sacrificing innovation and differentiation. To meet these demands, Xilinx(r) 7 series FPGAs leverage the unprecedented power, performance, and capacity enabled by TSMC’s 28 nm high-k metal gate (HKMG), high performance, low power (HPL) process technology and the unparalleled scalability afforded by the FPGA industry’s first unified silicon architecture to provide a comprehensive platform base for next-generation systems.

The rapid change in today’s design environment requires a programmable solution that provides the highest performance and lowest power at the lowest cost. To meet the needs of high-volume systems, it is essential that the solution uses the latest 45 nm high-volume technology.

This white paper describes several aspects of power related to the Xilinx(r) 28 nm 7 series FPGAs, including the TSMC 28 nm high-k metal gate (HKMG), high performance, low power (28 nm HPL or 28 HPL) process choice. The power benefits afforded by the 28 HPL process and its usefulness across Xilinx’s full product offerings is described as well as the architectural innovations and features for power reduction across the dimensions of static power, dynamic power, and I/O power.

Xilinx delivers the first automated, fine-grain clock-gating solution that can reduce dynamic power by up to 30% in Virtex(r)-6, Spartan(r)-6, Kintex(tm)-7, and Virtex-7 FPGA designs. Xilinx intelligent clock-gating optimizations are automatically performed on the entire design, introduce no new tools or steps to the flow, and generate no changes to the existing logic or to the clocks that alter the behavior of the design. And, in most cases, the timing is also preserved.

Texas Instruments is world’s first semiconductor company to license EtherCAT technology and integrate it into the Sitara AM335x ARM generation of ARM Cortex-A8-based microprocessors (MPUs). This whitepaper explores implementation of this technology on the AM335x processor through its programmable real-time unit (PRU)-based programmable technology to create a unified front-end for industrial communications and bring EtherCAT and other industrial standards to its growing platform of ARM-based microprocessors.

RTL simulation is no longer capable of providing all of the verification required for today’s complex designs. Modern systems are a complex mixture of hardware and software, digital and analog, and the boundaries of the system are often difficult to define.

The focus on safety-critical applications in both the automotive and industrial markets is significantly growing, bringing new and added pressures to systems engineers as they work to solve safety challenges.

Used correctly, PUE metrics optimize the data center environment.

Developers, learn how to create secure code. This course will teach you the essential secure coding principals for C/C++, along with the technical details of buffer overflows, and much more.

When considering integrated circuits for an implantable device, one must examine the entire system from the top level. Overall system-level requirements, such as functionality, performance, size, weight and power should be considered. This white paper describes the electronic features of implantable circuits and the integration of these features into silicon.

Today, embedded devices are all around us–in kiosks, point-of-sale (POS) terminals, ATMs, medical equipment, and more. For far too long, however, protecting the integrity of these devices and the sensitive information they contain has been an afterthought. McAfee(r) Embedded Control enhances embedded device integrity, maximizing uptime, reducing support costs, and helping to ensure compliance throughout the lifecycle of your devices.

Photovoltaic (PV) power systems, including solar power inverters, are expected to operate reliably and at full rated output for a minimum of 25 years, so they need highly efficient inverters that run cooler, last longer and generate cash savings for the PV system manufacturer and user. Download this white paper from Silicon Labs to find out how advanced digital isolation technologies boost solar power inverter reliability.