Why Daimler selected Xilinx for AI and autonomous drive

July 5, 2018 Brandon Lewis

Late last month Xilinx announced that Daimler AG has selected their processing technology for use in future Mercedes-Benz models. Daimler is the latest of dozens of automotive manufacturers/suppliers to leverage Xilinx FPGAs and programmable SoCs in automotive subsystems. These include forward safety cameras and lidar, where Xilinx compute elements hold 38 percent and greater than 90 percent market share, respectively.

But Daimler didn’t select Xilinx as a partner simply to join the bandwagon. Rather, the German automaker is focused on autonomous drive applications and artificial intelligence (AI).

How programmable processing fits in next-gen automotive

With the automotive market investing heavily in autonomous drive, interest in enabling technologies like AI has accelerated. For instance, neural networks running on automotive sensors nodes and in centralized advanced driver assistance system (ADAS) control modules can help identify hazardous conditions quickly while filtering out excess data “noise.”

GPUs have gained a lot of attention as a processing platform for these AI-driven automotive safety workloads, particularly in the world of research and development. However, GPUs come with technical shortcomings in real-world automotive applications, including power consumption, thermal dissipation, size, and, perhaps most notably, latency and throughput.

As shown in Figure 1, single-instruction, multiple data (SIMD) operation means that sensor inputs are batched when inferencing on a GPU. Larger batches, therefore, assume a higher latency, while smaller batches result in lower compute efficiency. This impacts determinism, which is critical in automotive safety applications.

Figure 1. The single-instruction, multiple data (SIMD) architecture of GPUs relies on batching data, which can add latency and reduce determinism in applications like automotive AI inferencing.

According to Willard Tu, Senior Director of Automotive at Xilinx, programmable processor architectures permit the same sensor inputs to be executed individually and in a deterministic manner while still supporting low levels of latency and high throughput (Figure 2). This is preferred for individual camera, radar, or lidar sensor nodes in a vehicle, as real-time data pre-processing and inferencing is a requirement. Batch processing is also possible with programmable logic, which makes the technology suitable for systems performing data aggregation and sensor fusion such as centralized ADAS control modules.

Figure 2. Programmable logic devices like FPGAs enable sensor inputs to be executed individually in automotive AI inferencing applications, as opposed to batched. This improves determinism, latency, and throughput.

Programmable logic offers other benefits to modern vehicle architectures as well, such as reconfigurability. Those familiar with the Internet of Things (IoT) will recognize the term over-the-air (OTA) software updates. FPGAs and FPGA SoCs enable something similar in hardware through what Xilinx has termed “OTA silicon”.

The premise of OTA silicon is that programmable logic elements can be remotely reconfigured if new features are added, updates to mission-critical functions are required, or changes in vehicle architecture demand components to be repurposed for a different use. This especially relevant for AI-enabled automotive applications, as neural network models will routinely be modified to improve their performance over the lifecycle of a vehicle and may need compute elements that are better equipped to execute the new inferencing software. Another example is that OTA silicon can adapt to evolving New Car Assessment Programme (NCAP) guidelines, which are currently on a six to 12-month release cadence through 2025 (Figure 3). For context, most ASICs have a 12 to 18-month production cycle.

Figure 3. The European New Car Assessment Programme (NCAP) is currently operating on a six to 12-month release cycle that will require adaptability from new vehicle designs in order to avoid obsolescence.

Dynamic Function Exchange (DFX) is one feature that complements OTA silicon by allowing the same piece of programmable silicon to be utilized for multiple, mutually exclusive functions. DFX supports time multiplexing so that sequential processing can be implemented differently for different functions on the same fabric. These blocks can also be partially reconfigured, reducing the number of devices, cost, and power consumption typically associated with computing more than one function.

Figure 4. Dynamic Function Exchange (DFX) allows a single piece of programmable logic to perform mutually exclusive functions. These logic blocks can also be reconfigured via “OTA silicon” mechanisms.

Xilinx’ 16 nm ASIL C-qualified MPSoC family includes SKUs that support these capabilities.

Daimler chooses flexibility, adaptability, and scalability for automotive differentiation

So, why did Daimler AG select Xilinx technology for their future automotive processing applications? The answer comes down to flexibility, adaptability, and scalability of programmable logic in the brave new world of AI and autonomous drive.

The Xilinx Adaptable Compute Acceleration Platform (ACAP) is also designed to build on those principles for automotive and other markets, delivering 8 MP camera support as a combined machine learning and functional safety programmable logic element. You can read more about ACAP here.

About the Author

Brandon Lewis

Brandon Lewis, Editor-in-Chief of Embedded Computing Design, is responsible for guiding the property's content strategy, editorial direction, and engineering community engagement, which includes IoT Design, Automotive Embedded Systems, the Power Page, Industrial AI & Machine Learning, and other publications. As an experienced technical journalist, editor, and reporter with an aptitude for identifying key technologies, products, and market trends in the embedded technology sector, he enjoys covering topics that range from development kits and tools to cyber security and technology business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached by email at brandon.lewis@opensysmedia.com.

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