Intel, up Tunnel Creek, with SoC?

April 14th, 2010

So, there’s this Intel Atom processor – maybe you’ve heard of it. That’s really a misnomer: Atom consists of multiple platforms, including today’s known as Menlow, and two Intel is pushing at IDF Beijing this week: Moorestown, and Queensbay. The latter may be the one we’ve been waiting for with a SoC named Tunnel Creek.

This is going to be oversimplified, but should give you the highlights. Today’s Menlow platform circa 2008 is really two chips: Silverthorne, the processor, and Poulsbo, the system controller hub. Solid, albeit first-generational solution. Promised soon: even lower power, including idle modes needed for the latest devices.

Not quite delivered yet, Moorestown platform circa 2010. Moorestown has undergone twists and turns, which we won’t document here because it’s still not clear to me if this is Intel, TSMC, Moblin, MeeGo, or whatever, a lot of moving targets are involved. A couple things are clear: Intel’s Executive VP David Perlmutter said it’s “on track” for 1H2010, which is code for there will be some chips somehwere, but keep reading the next paragraph. It will offer much lower power consumption: a demo Perlmutter showed provided 50 times idle power reduction, and 10 times audio playback power reduction. Moorestown remains a chipset – Lincroft processor which moves the graphics core and memory controller inside, Langwell I/O hub which claims to add things like solid-state disk support. All in all, it’s still two (or more, there’s power controllers and wireless networking) chips, which still makes it too big for truly handheld stuff, no matter what Intel is saying.

Of much more interest to me was Doug Davis, GM of the Embedded and Communications Group, getting on stage with Tunnel Creek. Davis showed a diagram going straight from Menlow to Queensbay, really the Tunnel Creek CPU which finally brings everything into an SoC and provides a PCIe connection into many, many more worlds. Gone is the FSB and the “southbridge” of the previous platforms, although Davis did show an Intel PCIe hub as one option. Besides saving space and improving performance and power, this starts to look from both a packaging and flexibility standpoint like a true SoC solution – not all that dissimilar from competing architectures – that could take on these deeply embedded apps like smartphones and more. PCIe silicon gives a lot of options to expand the platform, something Intel is counting on heavily.

To me, the big question is how soon is Tunnel Creek actually here? The press release and two briefs didn’t provide that answer yet, but this could be the one to wait for depending on the timing.

Topics covered in this article

Silicon, software, and strategies for embedded devices
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