Multicore adoption is the key for many high-performance and low-power computing applications to meet the ever-increasing market and user demands. But the associated migration challenges, if not properly accounted for, can derail the performance and power gains and seriously jeopardize safety-critical systems with buggy implementation. Arizona State University School of Computing and Informatics Professor Yann-Hang Lee is involved in research to develop tools to make multicore integration smoother, particularly with increasingly high-performance automotive systems that are aimed to migrate to multicore architectures.
"The most challenging part of multicore development is you have to divide the original task, and you have to provide the proper coordination among the subtasks that are running on a multicore architecture," Lee says. "So far most software development basically assumes you have one processor running, and so your software design tool, software development tool, your mentality, all those things have to change to adopt multicore."
Part of Lee's research through ASU's Center for Embedded Systems (CES) involves creating a tool to optimize parallelization in a multicore implementation of an automotive engine control system. Automotive companies are thinking about adopting multicore, Lee says, to take advantage of the next generation of processors and to gain higher performance for better engine control. The higher performance available through a multicore architecture can affect engine performance, ride comfort, and potentially even fuel savings, but an engine control system's critical timing must transfer accurately to a multicore architecture.
"Engine control is time critical," Lee says. "In other words, by a certain time you need to provide the output, which is a design constraint. When we split the job to run it on a multicore architecture we also have to make sure the output will be computed within the deadline."
Additionally, automotive sequential legacy code isn't automatically parallelizable, so strategies must be studied to migrate engine control systems from single-core to multicore processors.
This project uses a model-based development approach; the computation starts with a high-level model and Lee, Assistant Professor Georgios Fainekos, and their research team look at how the computation is broken down into parallel units, and check how the tasks are given to the cores and the timing of communication to understand the behavior. From this they are developing a program to generate appropriate behavior automatically.
"We try to understand the program behavior and generate a program based on the model," Lee says. "Then we do core generation and follow up verification to make sure the execution is finished before the deadline."
To date, Lee's team has developed a platform for multicore program execution, and they can use a Simulink model to automatically generate a core running the platform (Figure 1).
"This platform has a real-time operating system (RTOS) to support the communication and synchronization between multiple cores, and we can look into the Simulink model to generate a proper synchronization and communication mechanism to support the inter-core communication as well as the communication within each core," Lee says. "We have a running prototype to facilitate program execution, model-based core generation, and execution in a multicore architecture."
The goal is for CES member companies to get insight into efficient design methodologies and programming approaches for embedded control algorithm parallelization. Lee's team is continuing to analyze and optimize the model as well as building a model to verify schedulability, or to make sure the task will be completed before its deadline in the worst possible case.