5 through 14 of 536 articles found
Embedded Computing Design
An innovative approach to communication processors: Multicore Done Rightâ„¢
By Jeff Richardson (LSI Corporation)
Summary:
Asymmetric multicore architectures are needed to achieve wire-speed, deterministic performance at the lowest power and cost.
Asymmetric multicore architectures are needed to achieve wire-speed, deterministic performance at the lowest power and cost.
Embedded Computing Design
Nonintrusive visibility into multicore SoCs
By Rick Leatherman (MIPS Technologies)
Summary:
Developers must choose a processor architecture with a seamless development environment that includes compilers, debuggers, and performance and profiling tools.
Developers must choose a processor architecture with a seamless development environment that includes compilers, debuggers, and performance and profiling tools.
Embedded Computing Design
More cores, less waiting
By Stephen Lau (Texas Instruments)
Summary:
Optimizing multicore devices will be one of the biggest challenges facing developers in the future.
Optimizing multicore devices will be one of the biggest challenges facing developers in the future.
Embedded Computing Design
Multicore progressively powers networking equipment with high-performance software
By Eric Carmes (6WIND)
Summary:
The Fast Path architecture offers a progressive migration path that enables software reuse and optimizes return on development investment.
The Fast Path architecture offers a progressive migration path that enables software reuse and optimizes return on development investment.
Embedded Computing Design
Monitor opens an eye to high-speed SERDES performance
By Kevin Walsh (Snowbush IP, a division of Gennum)
Summary:
On-chip eye-monitoring techniques provide visibility to receive-side data after equalization, offering a view of the PHY's performance.
On-chip eye-monitoring techniques provide visibility to receive-side data after equalization, offering a view of the PHY's performance.
Embedded Computing Design
New trends in heterogeneous multicore SoCs
By Grant Martin (Tensilica)
Summary:
Data plane processing units allow designs to be more flexible and optimized than what designers could achieve in the past.
Data plane processing units allow designs to be more flexible and optimized than what designers could achieve in the past.
Embedded Computing Design
Video: Q Rate® Connectors from Samtec
By John Hynes (Samtec) and Danny Boesing (Samtec, Inc.)
Summary:
Boldly going where no connector has gone before. Q Series® ground plane with enhanced performance Edge Rate contacts and a smaller PCB footprint.
Boldly going where no connector has gone before. Q Series® ground plane with enhanced performance Edge Rate contacts and a smaller PCB footprint.
White Paper
EPLSP Series High Speed I/O Cable Assembly
By Samtec (Samtec) and Samtec (Teraspeed Consulting Grouop)
Summary:
Take a pass on bulky, expensive high speed I/O systems with Samtec's EyeSpeed I/O System.
Take a pass on bulky, expensive high speed I/O systems with Samtec's EyeSpeed I/O System.
Embedded Computing Design
Making multicore CPUs work in embedded communications designs
By Jarrod Siket (Netronome Systems)
Summary:
As network traffic gets more voluminous, diverse, and unpredictable, the solutions that used to work well are being overtaxed. A new heterogeneous multicore architecture comes to the rescue.
As network traffic gets more voluminous, diverse, and unpredictable, the solutions that used to work well are being overtaxed. A new heterogeneous multicore architecture comes to the rescue.
Embedded Computing Design
Enabling better testing: Reprogrammable on-chip instrumentation
By Paul Bradley (DAFCA)
Summary:
This extensive look underneath the hood at on-chip instrumentation shows how at-speed validation for SoCs can be greatly improved with the right visibility inside.
This extensive look underneath the hood at on-chip instrumentation shows how at-speed validation for SoCs can be greatly improved with the right visibility inside.


